Circuit design of vehicle detection system control unit based on ARM

Due to the increasing demand for traffic, more and more circular induction coil detectors are used for traffic detection. These coils buried under the road surface can detect electromagnetic changes when vehicles pass by and accurately calculate traffic flow. Traffic flow is the basic data for traffic statistics and traffic planning. These detection results can be used to calculate occupancy (characterizing traffic density). When using the dual-coil mode, it can also provide data such as speed, vehicle driving direction, and vehicle type classification. These data are extremely important for traffic management and statistics. Usually, the highway vehicle detection system consists of a multi-channel circular detection unit LD4 and a control unit CCU. This paper uses the latest ARM7 core microprocessor LPC2114 launched by PHILIPS to design and implement the control unit part of the vehicle detection system, and together with 5 LD4 circular detectors, it forms a 10-channel highway vehicle detection system. Its principle block diagram is shown in Figure 1.

Figure 1 Schematic diagram of vehicle detection system

Figure 2 Control panel system block diagram

Overall design

The principle block diagram of the control board system designed in this paper is shown in Figure 2. The LPC2114 is used as the core control unit. The chip is a 16/32-bit CPU based on the ARM7TDMI-S core that supports real-time simulation and tracking. It integrates 4 10-bit A/D converters, two 32-bit timers, a real-time clock and watchdog, multiple serial interfaces, including two industrial standard UARTs, high-speed and two SPI bus interfaces, and up to 46 general I/O ports compatible with TTL levels. It is very suitable as a master control unit. The CPLD EPM7128 is used as the extended input/output of the microprocessor. It is connected to the LD4 standard definition bus through optocouplers. The bus defined by the standard is based on the RS-485 bus communication protocol. LD4 and the control board exchange data through the standard bus. The control board scans and sends a command requesting data every 10 seconds. The corresponding LD4 channel returns the requested data or invalid information. The ARM processor performs corresponding statistical operations on the data obtained from each channel. The statistical data is stored in static RAM at intervals set by the user for the central station to obtain regularly. At the same time, the statistical data is backed up to the Flash electronic hard disk in units of minutes. The central station can obtain the data of the corresponding time period by requesting the backup data command and store it in the database. The central station and the control panel communicate using the RS-232 serial port and use the modem to realize remote data transmission. In order to solve the problem of large-capacity storage, the system uses the K9F2808 provided by Samsung as an electronic hard disk. The 16MB capacity can store 11 days of backup data, and the electronic hard disk can be flexibly upgraded.

Realization of interface between LPC2114 and electronic hard disk

In order to prevent data loss due to transmission and central station failures, the system requires data to be backed up over a period of time. Therefore, large-capacity storage issues need to be considered during system design.

It is assumed that this system needs to back up statistical data once every minute. According to the data format of the ring detector LD4, the amount of data at a time is 1026B. If static RAM is used as a storage unit, multiple large-capacity RAMs need to be cascaded, which is expensive and difficult to expand the storage capacity. If dynamic RAM is used as a storage unit, the disadvantage is that it is difficult to control and requires a dynamic RAM controller to assist in operation. Flash is easy to use as a memory and has a large capacity. Although its service life is limited, considering that the system stores 1026B every minute, for a 16MB capacity, it is fully written once every 11 days, so it is erased about 3 times a month. Based on this calculation, it is erased about 36 times a year, and the life of Flash is generally erased more than 100,000 times, so this system can completely use Flash as an electronic hard disk in the vehicle detection system. In addition, Flash also has the characteristics of non-volatile power failure, which is more suitable for application in this system.

In order to facilitate the upgrade and expansion of storage capacity, this system uses K9F2808 as the memory. K9F2808 is a 48-pin surface mount device. The chip has (16M+512K)×8 bit storage space inside, which can be composed of 32768 rows and 528 columns. The column address encoding of the 16 reserved columns is 513"527, which can perform read and write operations of 528 bytes as a page and erase operations of 32 pages as a block. In addition, the characteristics of K9F2808 are that its command, address and data information are all transmitted through 8 I/O buses, with unified interface standards, which is easy to upgrade storage capacity.

Figure 3 Schematic diagram of LPC2114 and electronic hard disk connection

Figure 3 is a schematic diagram of the connection between LPC2114 and the Flash electronic hard disk. Since LPC2114 has no external bus, the Flash operation can only be performed in I/O mode. The various operations of K9F2808 have a common feature, that is, the operation command word is first sent to the command register at the I/O port, and then the address of the unit to be operated is sent in three consecutive cycles, in the order of A0"A7, A9"A16, A17"A23, where A8 is determined by the command word.

Taking page programming operation as an example, the ARM driver program of K9F2808 (based on ADS1.2 development environment) is given below. The page read and block erase methods are similar to page programming, except that the data is latched by the #RE signal during reading, and only two cycles of address are required for erasing.

row_add is the page number, which needs to be shifted left by 9 bits to get the row address. erase_flash()——Erase Flash function

write_command()——write command function

write_address()——write address function

write_data()——write data function

read_data()——Read data function

void flash_store(uint32 row_add, uint8 *buffer)

{ uint16 i;

uint32 statue,address;

//Variable definition

IO0DIR = 0x00ff0000;

//Set IO direction

if((row_add== 0) ((row_add%32)==0))

{address = row_add＜＜9;

address &= 0x00fffe00;

erase_flash(address);}

// Erase Flash

write_command(0x80);

//Write command 80H

address = row_add＜＜9;

address &= 0x00fffe00;

write_address(address);

//Write address

statue = IO0PIN;

//Get status

while((statue&fr_b)==0)

[page]

{statue = IO0PIN;}

//Busy, waiting

for(i=0;i＜528;i++)

//Write 528 bytes

{write_data(*(buffer+i));}

//Write data

write_command(0x10);

//Write command 10H

statue = IO0PIN;

//Get status

while((statue&fr_b)==0)

{statue = IO0PIN;}

//Busy, waiting

write_command(0x70);

//Write command 70H

statue = read_data();

//Get status

if(statue&0x01)

{IO0SET = errorled;}

// Operation failed

}

LPC2114 serial communication implementation

The control system exchanges data with LD4 and the central station through two UARTs of LPC2114. The two UARTs have 16B transmit and receive FIFOs with adjustable trigger points. UART1 has a modem interface compared to UART0. The basic operation method of UART is similar to that of traditional 51 core microcontrollers.

First, set the I/O connection to UART; then set the serial port baud rate (such as U0DLM, U0DLL); then set the serial port working mode (such as U0LCR, U0FCR); now you can send/receive data through registers U0THR and U0RBR, and the status information of the send/receive module can be read through the U0LSR register.

The system communicates with the LD4 board through the RS-485 bus, and uses the MAX3485 as the RS-485 bus controller to communicate with the UART1 of the LPC2114. The MAX3485 is a 3.3V powered half-duplex transceiver chip that converts the differential RS-485 bus signal into a serial port signal that the ARM core can accept. In order to achieve communication with the PC, the system uses the MAX3232 with a 3.3V operating voltage as the RS-232 level conversion chip.

LPC2114 Design Considerations

There are some issues that need special attention during the development of LPC2114, which are summarized as follows:

(1) When the user program cannot run after being written to Flash, first, you need to consider whether the interrupt vector table is correct. The cumulative sum of the interrupt vector table must be 0. Secondly, you need to consider the location of the vector table. Is the vector table already located at address 0x00000000? Then, you need to consider whether the setting of the MEMMAP register is correct, otherwise the interrupt cannot be executed. In addition, you also need to consider whether the ISP hardware conditions are met. When #RESET is low on the P0.14 pin of LPC2114, the low level on this pin line will force the chip to enter the ISP state. When designing the hardware, you must add a 10KW pull-up resistor to this pin. Otherwise, the pin will be unstable and will affect the startup of the device.

(2) LPC2114 has 46 GPIOs, which can be configured arbitrarily, but some pins are open-drain outputs (P0.2, P0.3), which require pull-up resistors. In addition, the Flash memory K9F2808 status output pin R/#B is open-drain output, which requires a 10KW pull-up resistor.

(3) After the LPC2114 chip is encrypted, the JTAG debugging and downloading functions can only be restored after the chip is globally erased through ISP. When #RESET is low, the low level of P1.26 makes P1.26"P1.31 as the debugging port after reset. Note that a weak bias resistor must be connected between the P1.26 pin and the ground.

System software design ideas and precautions

The ARM software of the vehicle detection system adopts a layered design concept. The entire software consists of two parts: the driver and the application software. The driver part encapsulates Flash operations, RS-485 operations, real-time clock (RTC) operations, RS-232 operations, and I/O operations. The application software is divided into a basic function library and a main program. The main program flow is shown in Figure 4.

Figure 4 Main program flow chart

In 32-bit ARM core application systems, in order to initialize the system, an assembly file is often used as the startup code to implement operations such as stack, interrupt, system variables, I/O initialization and address remapping. The strategy of the development platform ADS is not to provide complete startup code, and the insufficient part needs to be written by the developer himself.

The startup code of the system design includes the interrupt vector table, stack initialization, and the interface between the corresponding interrupt service program and C language. For LPC2114, in order to make the 32-bit cumulative sum of all data in the vector table 0, the reserved vector value is set in the vector table, and the 32 bytes in the interrupt vector table are accumulated, among which the reserved vector value does not need to be accumulated, and then the complement of the accumulated value is taken. The lower 32 bits of this complement are the value of the reserved vector. The reserved vector value will be used as a valid user program keyword by the BOOT loader. When the cumulative sum of all data in the vector table is 0 and the ISP external hardware conditions are not met, the BOOT loader will execute the user program.

Conclusion

This paper implements the design of the control unit of the highway vehicle detection system based on the latest ARM7 core microprocessor LPC2114 of PHILIPS. LPC2114 is simple to use, easy to develop, and has a high cost performance, making it very suitable for embedded systems. At present, this system has been launched on the market and has achieved good economic benefits.