Internal hardware resources of PIC microcontroller 16F84

The source program example of the PIC16F84 microcontroller lighting up a light-emitting diode introduced by the author in the previous issue is to illustrate the basic format of the specific application of the PIC microcontroller 16F84.
Now we already know that for the microcontroller to work, we need to compile the program in assembly language. When programming a PIC microcontroller, we also need to have some understanding of the internal hardware resources of the selected PIC microcontroller. Here we introduce the internal structure of the PIC16F84 microcontroller, as shown in the block diagram in Figure 1. As can be seen from Figure 1, its basic composition can be divided into four main parts, namely, the arithmetic unit ALU and working register W; program memory; data memory and input/output (I/O) port; stack memory and timer, etc. Now they are introduced as follows.
1. Arithmetic unit ALU and working register W
Arithmetic unit ALU is a general arithmetic and logic operation unit, which can be used to perform arithmetic (such as addition, subtraction, multiplication, division, etc.) and logic operations (such as AND, OR, XOR, etc.) on two numbers in the working register W and any general register. 16F84 is an eight-bit microcontroller, and the word length of ALU is eight bits. In instructions with two operands, typically one operand is in the working register W, and the other operand is in a general register or an immediate value. In the case of only one operand, the operand is either in the working register W or in a general register. The W register is a register dedicated to ALU operations and is not addressable.
Depending on the instruction executed, the ALU may also affect the carry flag C, the all-zero flag Z, etc. of the status register STATUS in the block diagram.
2. Program memory
The memory in the microcontroller that stores program instructions is called the program memory. All instruction words of PIC16F84 are 14 bits long. Therefore, each storage unit of the program memory is 14 bits wide. One storage unit stores one instruction. The program memory of 16F84 has 1024 (28) storage units (storage capacity is 1k). These program memories are all composed of FPEROM.
The program memory is addressed by the program counter PC. The program counter of 16F84 is 13 bits wide and can address 8K (8×1024) of program memory space, but 16F84 actually only uses 1k of space (unit address is 0～3FFH). When accessing storage units beyond these address spaces, it will cause a loop back to the valid storage space.
For users who have used other microcontrollers, they may feel that the on-chip memory capacity of 16F84 is too small. In fact, this is not the case, because the instruction system of 16F84 is composed of single-word instructions. Compared with other microcontrollers with two-byte, three-byte or even four-byte instructions, the effective capacity of the program memory of PIC microcontroller is 2.5 to 3 times larger than the nominal value.

Chengdu Weidong

Knowledge contest questions:
15. Briefly describe the possible range of operands f, d, b, and k in the mnemonic instructions of the PIC series microcontrollers, and briefly explain their basis.
16. Point out the types of registers in the PIC16F84 microcontroller block diagram (Figure 1 above) and the names of the registers that cannot be accessed?

3 Data memory
In the PIC16F84 microcontroller, in addition to the program memory for storing programs, there is also a data memory. When executing a program, the microcontroller often needs to input some data to the microcontroller at any time, and some data may change at any time. In this case, a data memory is needed. Since the data memory must not only be able to read the data stored in its various units at any time, but also write new data at any time, or rewrite the original data. Therefore, the data memory must be composed of a random access memory RAM. When the RAM memory is powered off, the stored data is immediately lost, which sometimes brings inconvenience in practical applications. However, there is a 64×8-bit E2PROM data memory in the 16F84 microcontroller. The data stored in the E2PROM will not be lost when the power is off.
The RAM data memory in the 16F84 microcontroller is shown in Table 1. The RAM is divided into two banks: Bank 0 and Bank 1. Each bank can directly transmit information using the internal bus, so they all work and address in register mode. These eight-bit registers can be divided into two parts: general registers and special registers. General registers store data, and special registers store information that controls the operation of the microcontroller. Each memory bank can be expanded to a maximum of 7FH (128 bytes). In each memory bank, special registers are arranged in the low address space, and general registers are arranged in the high address space.
General registers have a single usage, but special registers have their own uses. Here is a brief introduction to the more basic special registers.
(1) Program counter (PCL, PCLATH). The program counter PC is a counter that manages the program. The program counter of PIC16F84 is 13 bits wide, and the maximum addressable storage space is 8k×14 bits. In fact, 16F84 only uses the first 1k×14 bits (0000~03FFH) of the storage space. Because the program counter is 13 bits wide, and the special register is only 8 bits. Therefore, PC is composed of two special registers. The lower eight bits PCL are a read/write register (address 02H or 82H), while the high byte PCH (valid bit 5) cannot be directly read/written. It is transmitted to the high byte of the program counter through an 8-bit holding register PCLATH (address 0A or 8AH). When CALL or GOTO is executed to write PCL, the high byte of the PC value is loaded from the PCLATH register.
(2) Status register STATUS. The status register STATUS contains the status of the arithmetic logic unit ALU operation result (such as whether there is a carry, etc.), reset status and data storage bank selection bit. The settings of the relevant bits are shown in Table 2, and the functions are as follows:
1) Bit 0. Carry/borrow bit C. After executing addition and subtraction instructions
Table 2
IRP RP1 RP0 TO PD Z DC C
, if the result has a carry or borrow, C is set to 1, otherwise it is set to 0. This bit is also used when executing shift instructions.
2) Bit 1. Auxiliary carry/borrow bit DC. After executing the addition and subtraction instructions, if there is a carry or borrow from the lower four bits of the result to the upper four bits, DC is set to 1, otherwise it is set to 0.
3) Bit 2. Zero flag. If the result of the operation is zero, Z is set to 1; if the result of the operation is not zero, Z is cleared.
4) Bit 3. Low power flag PD. Set to 1 after power-on reset or execution of the CLRWDT instruction, and cleared after execution of the SLEEP instruction.
5) Bit 4. Timer time-out flag TO. Set to 1 after power-on reset or execution of the CLRWDT or SLEEP instructions, and cleared when the watchdog timer time-out.
6) Bits 5 and 6 (RP0, RP1). These two bits are used for register bank selection during direct addressing. That is, 00 - select Bank0 (00H~7FH); 01 - select Bank1 (80H~FFH). 16F84 has only two storage banks. Therefore, 10 and 11 are not used.
7) Bit 7 IRP. This is the register selection bit for indirect addressing. 0 - Select Bank 0, 1 (00H ~ FFH), 1 - Select Bank 2, 3. 16F84 only has Bank 0, 1, so this IRP bit should be set to 0.
(3) Indirect addressing of INDF and FSR registers
The INDF register is not a physical register, but a logical function register (address 00H or 80H). When addressing the INDF register, it actually accesses the unit pointed to by the content of the FSR register, that is, the FSR register is used as an indirect register. FSR is called the "register selection" register, and its address is (04H or 84H). Indirect addressing of the INDF register itself will read the content of the FSR register. For example, when FSR = 00H, the data read from INDF by indirect addressing will be 00H. When writing to the INDF register using indirect addressing, although the write operation may affect the status word in STATUS, the written data is invalid. 6. Timer/Counter TMRO
There is a timer in the PIC 16F84 microcontroller. This timer can also be used for counting, so it is called a timer/counter, and its symbol is TMRO. TMRO can be used for timing control, delay, counting and detecting external events, etc. TMRO is an 8-bit increment (plus 1) counter. Its address in the data memory is 01. The clock source used by the timer can be the internal system clock (OSC/4, that is, four times the oscillation period) or an external clock. If TMRO counts the standard pulse series of the internal system clock, it becomes a timer; when it counts external pulses, TMRO becomes a counter.
Regardless of the timing or counting mode, TMRO does not occupy CPU time when counting the internal clock or external events, unless TMRO overflows, it may interrupt the current operation of the CPU. It can be seen that the timer is an efficient and flexible component in the 16F84 microcontroller.
In order to expand the scope of timing or counting, there is also a programmable prescaler in conjunction with the use of TMRO. This scaler is actually a programmable frequency divider.
The internal structure diagram of TMRO is shown in the attached figure. Its working mode is controlled by the option register OPTION in the data memory. OPTION is a read/write register, as shown in the attached table. It contains various control bits for configuring TMRO/WDT prescaler, external INT interrupt, TMRO, etc.
The timing and counting mode of TMRO is determined by D5 (i.e. TOCS bit) in the OPTION register. When TOCS=0, it works in timer mode; when TOCS=1, it works in counter mode. When it works as a timer, it adds 1 for each instruction cycle (without prescaler); and when it works as a counter, it adds 1 when the level on each RA4/TOCKI pin changes. Bit 4 (TOCS bit) of the OPTION register determines the triggering mode of the external pulse. When TOSE=1, it is triggered by the falling edge; TOSE=0, it is triggered by the rising edge. When the internal counter of TMRO overflows (from FFh→00h), the overflow bit is sent to the interrupt control register INTCON.
As can be seen from the attached figure, the prescaler is also an 8-bit counter. Its division number is changed by the values ​​of the three bits PS2~PS0 in the OPTION register. The frequency division number can be one of the following eight types: 1:1, 1:2, 1:4, 1:8, 1:16, 1:32, 1:64 and 1:128.
When the divider is used for TMRO, all instructions written to TMRO, such as CLRF 1, MOVWF 1, BSF 1, etc., will clear the prescaler. It should be noted that the prescaler cannot be read or written. This divider can be used for TMRO or WDT, and its switching is controlled by software. In order to avoid accidental chip reset, when switching is required, a corresponding program must be executed. The following is the program that needs to be executed when switching from WDT to TMRO:
CLRWDT;
clear WDT and prescaler
BSF STATUS, RP0; select memory bank 1
MOVLW B′xxxx0xxx′; PSA=0, select TMRO
MOVWF OPTION; send to OPTION register
BCF STATUS, RP0; reset memory bank 0

Chengdu Weidong

Knowledge contest questions:
21. Based on the description in the text below, please list in a table the names and addresses of at least 11 special registers of the PIC16C8X microcontroller (which has two memory banks and ports A and B).

4 I/O port
As a control device, the microcontroller must have data input and output. The input quantity may be temperature, pressure, speed, etc., while the output quantity may be switch quantity and data to ensure that the controlled process runs within the specified range. Both the input and output of data must pass through the relevant circuits inside the microcontroller, and then form an input/output (I/O) port with the pins. The PIC16F84 microcontroller chip has two I/O ports (PORTA and PORTB). Port A is a 5-bit port and port B is an 8-bit port, occupying a total of 13 pins. Each port consists of a latch (that is, the special function register 05H, 06H unit in the data memory), an output driver and an input buffer. When the I/O port is used as an output, the data can be latched; when used as an input port, the data can be buffered.
RA4 in the 16F84 PORTA port is a Schmitt trigger input and an open drain output. The other RA port pins are TTL level inputs and full CMOS drive outputs. Port PORTB is an eight-bit bidirectional programmable I/O port. Although each port is also composed of latches, drivers, buffers, etc., the circuits are also different due to slightly different functions. Now take the circuit of RA0 ~ RA3 of PORTA port (see the left figure) as an example to explain its basic working principle.
The I/O pin of RA port in the figure is defined by the data direction bit (register TRISA) to define the data flow direction. When the position of the TRISA register is "1", its output driver (composed of P-channel and N-channel MOS tubes connected in series) is in high impedance state, that is, both MOS tubes are cut off, and the I/O port is defined as input. At this time, data is input from the I/O terminal and goes to the D flip-flop through the TTL input buffer. When the read instruction is executed, this D flip-flop is enabled, and the data enters the data bus through the tri-state gate.
When the position of TRISA is "0", the I/O port is defined as output, and the output level of the output latch is the output level of the I/O port.
The result of reading the PORTA register is to read the level on the I/O pin, and the result of writing the PORTA register is to write to the I/O latch. All operations of writing I/O ports are a "read/modify/write" process, that is, read the I/O pin level first, then modify it by the program (give a value as required), and then put it into the I/O latch.
The output of the PIC16F84 microcontroller can provide 20mA of current, so it can directly drive the LED. Each bit of PORTA and PORTB can be defined as input and output respectively. The following example of the PORTA port initialization program explains how to select the I/O port.
CLRF PORTA; Port A is cleared
BSF STATUS; The RPO position of the status register STATUS is 1, and BANK1 is selected.
MOVLW 0xCF; Put the directional value
; 11001111 into the W working register
MOVWF TRISA; Set RA (3~0) bits as input
; RA 5.4 bits as output
; TRISA 7.6 bits are unused
When using the I/O port, you should pay attention to the following:
(1) When an I/O port is required to be used as input and output at the same time, the output value will be uncertain.
(2) The I/O pin output drive circuit is a CMOS complementary push-pull output. When it is in the output state, it cannot be connected to other output pins in "wired OR" or "wired AND", otherwise, the microcontroller will be burned out due to current overload.
(3) After writing to the I/O port, it is not suitable to directly perform a read operation. Generally, it is required to add at least one NOP instruction between two consecutive write and read instructions.
Example: MOVWF 6; write I/O
NOP; stabilize I/O level
MOVF 6, W; read I/O
5. Stack
When the microcontroller executes a program, it often needs to execute a subroutine call. This raises a question: how to remember where the subroutine was called from so that it can return correctly after executing the subroutine. In addition, during the execution of the program, an interrupt may occur and the interrupt subroutine will be executed instead. At this time, how to remember where the interrupt was from so as to return?
The method to meet the above functions is the "stack" technology.
The "stack" is a stack area used to store temporary data. When the main program calls a subroutine, the microcontroller executes the CALL instruction or an interrupt occurs, and the address of the next instruction is automatically "pushed" to the stack area. When the subroutine ends and the microcontroller executes the return instruction, the content of the stack area is automatically "popped out" as the new address for the next instruction to be executed.
The PIC16F84 microcontroller chip has an 8-level 13-bit wide (same width as PC) hardware stack, which does not occupy either program storage space or data storage space. When a CALL instruction is executed or an interrupt is responded to, the breakpoint address in the program counter PC is automatically pushed (PUSH) to protect it, and when a RETURN, RETLW or RETFIE instruction is executed, the breakpoint address in the stack will pop back (POP) to the program counter PC. Whether it is a PUSH or POP operation, it does not affect the content of the PCLATH register. Chengdu Weidong
Knowledge Contest Questions:
19. Briefly describe the functions of the PIC microcontroller I/O port.
20. The number of pins of PIC16C64A/RL64 and PIC16C65 are equal, and the pin functions are similar. However, the {16} pin of PIC16C64A/RL64 does not have CCP2, the {25} pin does not have TX/CK, and the {26} pin does not have RX/DT functions. Try to draw the pin function diagram of PIC16C64A/RL64.

7 Delay and timing
When designing a microcontroller application system, it is often necessary to make a process (such as heating, pressurization, etc.) last for a period of time, such as continuous pressurization for 1 minute, power on for 2 minutes, etc. How can the microcontroller correctly determine this period of time? This can be achieved in two ways, namely delay and timing. Take a look at the following example.
In the application system, the RAO terminal of the PIC16F84 microcontroller is required to control a light-emitting diode to flash at a certain frequency, which can be achieved through the circuit on the right. At the same time, a program must be compiled for the 16F84 microcontroller. From the circuit diagram, it can be seen that to make the light-emitting diode LED flash at a certain frequency, just make the RAO terminal output a changing high → low → high... level. Therefore, the following source program is designed (List 1):
list P=16F84, F=INHX8M
; ...
ORG 0
MOVLW 0; Main program starts
TRIS 5; Set port RA as output
BCF 5, 0; Clear port RA 0 bit
LOOP: CALL DELAY; Flash delay
COMF 5; Invert port RA, light-off alternation
GOTO LOOP; Loop
; ...
DELAY; The following is the delay subroutine
MOVLW D'50
MOVWF 8
LOOP1: MOVWF 9
LOOP2: DECFSZ 9, F
GOTO LOOP2
DECFSZ 8, F
GOTO LOOP1
RETLW 0
From List 1, it can be seen that when the main program starts, the working register W is first cleared, and then the content of the W register is sent to the TRISA register to clear it to set port RA as output. Then the 5th bit of port RA is cleared to make the LED off at the beginning. Then it continues for a period of time, that is, the delay subroutine is executed, and then the RA port is inverted, and it becomes a high-level output, the LED lights up, and then the delay is made, and the RA port is inverted again, and the LED goes out... In this way, the LED is dark and bright, and it keeps alternating.
Here, the LED is made bright and dark for a period of time by the microcontroller executing the delay subroutine DELAY. The core of this delay program is to let the CPU of the microcontroller repeatedly execute the instruction DECFSZ that reduces the register content by 1. That is, the decimal number 50 is loaded into the general registers F8 and F9 respectively to perform 50×50=2500 times of reduction by 1 operation. If it takes 1 instruction cycle to execute the DECFSZ instruction once (2 cycles are required for jumping), if the oscillation frequency is set to 100kHz, that is, the instruction cycle is 40μs, then the delay time is 2500×40=100000μs=100ms, that is, 0.1 second. In fact, it is slightly larger. This delay time has exceeded the visual retention time of the human eye. Therefore, we can clearly see the alternation of light and dark of the LED.
If we need a longer delay time, we can follow the above example and load a larger number or introduce multiple loops. Therefore, in principle, the delay time can be extended as needed.
However, the method of using a delay program to continue a certain process has defects. Delay is to make the CPU "circle" on certain instructions. The longer the delay, the more "circles". At this time, the CPU can no longer perform other operations, such as monitoring temperature, humidity, etc. This is not allowed in some real-time control systems. For this reason, a special "alarm clock" is set in the 16F84 microcontroller - timer TMR0. How long a process needs to last can be "dialed" into TMR0, and then it will "interrupt" and tell the CPU that the timing time is up. The CPU is required to suspend other work, turn around to execute the "interrupt subroutine", complete tasks such as outputting on and off signals, and then go back to execute the interrupt work. In this way, the CPU's work efficiency is improved. Therefore, the use of delay has limitations, and the use of timer TMR0 can be used in various occasions. 8 Interrupt
PIC 16F84 microcontroller has real-time processing function, and can handle abnormal events in the outside world in a timely manner by interrupt technology.
When the CPU of the microcontroller is processing an event, if an external event occurs (such as timer overflow, level change on the pin), the CPU is requested to process it quickly, so the CPU temporarily suspends the current work and turns to process the event. After the interrupt handles the event, it returns to the place where it was originally suspended and continues to perform the original work, as shown in Figure 1. The component that implements this function is called an interrupt system. The request source that generates an interrupt is called an interrupt source. The processing request made by the interrupt source to the CPU is called an interrupt request or interrupt application. The process in which the CPU temporarily interrupts its own affairs and turns to handle events is called the interrupt response process of the CPU. The entire process of handling events is called interrupt service (or interrupt processing). After the processing is completed, it returns to the place where it was originally suspended, which is called interrupt return.
The PIC16F84 microcontroller chip has 4 interrupt sources, and its logic circuit is shown in Figure 2.

9. Interrupt control
Interrupts are mainly controlled by the interrupt control register INTCON (Figure 3). INTCON is a read/write register that contains various enable controls and flags such as timer TMRO overflow, RB port changes, and external INT pin interrupts.
When the global interrupt enable bit GIE (D7) is set to 1, all unmasked interrupts will be enabled. If the bit is cleared to 0, all interrupts will be disabled. When responding to an interrupt, the GIE bit will be cleared to disable other interrupts, the return breakpoint address will be pushed onto the stack for protection, and then the interrupt entry address 0004h will be loaded into the program counter PC. In the interrupt service routine, by querying the interrupt flag bit, it is determined that the interrupt flag bit must be cleared by software before reopening the interrupt to avoid repeated interrupt requests.
(1) INT interrupt. The external interrupt on the RBO/INT pin is edge-triggered. When the INTEDG bit (bit 6 of the OPTION register) is set to 1, the rising edge is selected for triggering. If the bit is cleared to 0, the falling edge is selected for triggering. When a specified valid edge is detected on the pin, the INTE bit (bit D4 of INTCON) is set to 1. Before reopening this interrupt, the INTE bit must be cleared in the interrupt service routine. (2) TMRO interrupt. When the counter of timer TMRO overflows (i.e. changes from FFH to 00H), the hardware automatically sets TOIF (D2 bit of INTCON) to 1. The interrupt can be controlled by setting TOIE (D5 bit of INTCOND) to 1 or clearing it to 0.
(3) PORTB pin level change interrupt. Once there is a level change on the D7~D0 pins of the PORTB port, RBIF (D0 bit of INTCON) will be set to 1. This interrupt can be controlled by setting RBIE (D3 bit of INTCON) to 1 or clearing it to 0.
(4) Interrupt site protection. When an interrupt occurs, only the return breakpoint address is pushed onto the stack for protection. If the user also wants to protect key registers (such as the W register and the STATUS register), this needs to be implemented by software. For more information on interrupt site protection, please refer to the example of PIC microcontroller instruction reading in the 15th issue of this newspaper.

Chengdu Weidong

Knowledge Contest Questions:
23. Use simple examples to illustrate the use of interrupts in PIC microcontrollers.
Postscript: The "PIC Microcontroller Series Special Topic" has been published for fifteen issues so far, and there will be ten more issues to be published, totaling twenty-five issues. The future content will mainly focus on the compilation, practical application and development of PIC microcontrollers. Readers are welcome to give more opinions and suggestions on this topic. In order to cooperate with this topic, the "Electronic Newspaper Microcontroller Public Laboratory" also prepares a series of cost-effective PIC microcontrollers, programmers, and simulators suitable for beginners for readers and members. This column will gradually introduce them in the future. In addition, the "Knowledge Contest" questions of this topic will be published in the 32nd issue of "Electronic Newspaper" on August 13 this year. Readers are welcome to participate. Readers who participate must answer all the questions according to the numbers before September 5 and send them to the editorial department of this newspaper, or send an E-mail to dzb12@netdzb.com. We will select a number of first, second and third prizes, which will be awarded with cash prizes, PIC development kits, books and magazines, etc. (For details, please see page 11 of the 8th issue of "Electronics News" this year).

10 Reset
Reset is the initialization operation of the microcontroller. Its main function is to initialize the program counter PCL to 000H, so that the 16F84 microcontroller can start executing the program from unit 000H.
The PIC16F84 microcontroller has the following different reset modes.
(1) Chip power-on reset POR.
(2) Reset by adding a low level to the external MCLR pin in normal working state.
(3) Reset by adding a low level to the external MCLR pin in power saving sleep state.
(4) Reset by overflow of the watchdog timer WDT.
The PIC16F84 microcontroller has an integrated "power-on reset" POR circuit. For general applications, just connect the MCLR pin to a high potential.
To use MCLR reset in normal working or sleep state, just press a button on the MCLR pin and connect it to ground momentarily.
The reset operation of the microcontroller 16F84 will affect some other registers, as shown in Table 1.

11. Watchdog Timer WDT
MCU systems are often used in industrial control. There are usually various interferences at the operation site, which may cause the execution program to bounce into an infinite loop, thus paralyzing the entire MCU control system. If the operator is present, he can manually reset the system to get rid of the infinite loop. However, the operator cannot monitor the system all the time. Even if he monitors the system, he often performs a manual reset only after causing adverse consequences. Since the PIC16F84 MCU has an automatic program operation monitoring system, the watchdog timer WDT (Watch Dog Time), literally translated as "watchdog" timer. This is like an owner raising a dog. When the owner is working normally, he always remembers to feed the dog at regular intervals, so the dog stays quiet and does not affect the owner's work. If the owner takes a nap and stops working, after a certain period of time, the dog is hungry and finds that the owner has not fed it yet, it will bark and wake up the owner. It can be seen that WDT has the following characteristics:
(1) It can work independently and basically does not rely on the CPU.
(2) The CPU communicates with the WDT once at a fixed time interval (such as clearing it, that is, feeding the dog once) to indicate that the system is currently working normally.
(3) When the CPU falls into an infinite loop, it can be detected by the WDT in time (such as WDT count overflow) and reset the system.
The pulse sequence of the timing count of the WDT in the PIC16F84 microcontroller is generated by an independent RC oscillator on the chip, so it does not need any external devices to work. Moreover, this on-chip RC oscillator is independent of the oscillation circuit on OSC1/CLKIN (pin {16}). Even if the clocks on OSC1 and OSC2 are not working, the WDT can still monitor the timing. For example: when the PIC16F84 executes the SLEEP instruction, the chip enters the sleep state, the CPU does not work, and the main oscillator stops working, but the WDT can still monitor the timing. When the WDT timeout overflows, the chip can be activated (wake up) to continue normal operation. During normal operation, the WDT timeout overflow will generate a reset signal. If this monitoring timing function is not needed, this function can be turned off during firmware programming. The attached figure is a block diagram of the monitoring timer. Table 2 shows the registers related to WDT.
The basic timing time of WDT is 18ms without adding a divider. This timing time is also affected by temperature, VDD and process parameters of different components. If a longer timing period is required, the pre-divider can be configured to WDT through software control of the OPT/ON register. The maximum division ratio of this pre-divider can reach 1:128. In this way, the timing period can be expanded by 128 times, that is, 2.3 seconds.
If the pre-divider is configured to WDT, the CLRWDT and SLEEP instructions can be used to clear the WDT and the pre-divider at the same time, thereby preventing the chip from being reset due to the timing overflow. Therefore, under normal circumstances, a CLRWDT instruction must be executed before each timing overflow (i.e., feeding the "dog" once) to avoid causing a chip reset. When the system is severely disturbed and is in an out-of-control state, it is impossible to execute a CLR WDT instruction before each timing overflow. The WDT will generate a timing overflow, thereby causing the chip to reset and re-enter the normal operation state from the out-of-control state.
When the WDT timer overflows, the D4 bit T0 in the status register will also be cleared. By checking the T0 bit, you can know whether the reset is caused by the WDT timer overflow.

Chengdu Weidong

Knowledge contest question:
24. Briefly describe the role and function of the watchdog WDT in the PIC microcontroller.

12 How to use E2PROM
In the PIC16F84 microcontroller, in addition to the directly addressable data memory composed of SRAM, there is also an electrically erasable and electrically writable E2PROM data memory. The E2PROM has a total of 64 bytes, and its address is 00~3FH unit. Since the E2PROM has the characteristics of online rewriting and can still retain data after power failure, it can provide convenience for users' special applications. The E2PROM of 16F84 is readable and writable within the entire VDD operating voltage range during normal operation. Under typical circumstances, it can be rewritten 1 million times, and the data retention period is greater than 40 years. The E2PROM
of the PIC16F84 microcontroller is not mapped in the register group space, so they cannot be directly addressed by instructions like SRAM general registers, but need to be indirectly addressed through special registers. Therefore, the following four special registers are added to the 16F84 microcontroller, namely EECON1, EECON2, EEDATA, and EEADR, which are specifically used for on-chip operations on E2PROM. In this special register, EEDATA stores 8-bit read/write data, and EEADR stores the address of the E2PROM storage unit being accessed.
EECON1 is a control register with only the lower five bits. The upper three bits do not exist and are read as "0". See the table below for details.
D7 D6 D5 D4 D3 D2 D1 D0
－ － － EEIF WRERR WREN WR RD
The control bits RD and WR are used to start read and write operations respectively. These two bits can be set to 1 by software to start read and write operations, but cannot be cleared by software to prevent improper software operations from causing write failures. When the read and write operations are completed, they are automatically cleared by hardware, indicating that no read or write operations are being performed on the E2PROM at this moment. When the WREN bit is set to 1, write operations are allowed, and this bit is cleared to 0 when power is on. In normal operation, once there is a MCLR or WDT reset, the WRERR bit is set to 1, indicating that the write operation is terminated. When the write operation is completed, EEIF is set to 1 (needs to be cleared by software); when the write operation is not completed or has not yet started, EEIF is "0".
EECON2 is only a logical register, not a physical register, and will always be zero when read. It only works during a write operation.
(1) E2PROM read operation
To perform an E2PROM read operation, the following steps need to be performed:
1) Put the E2PROM unit address into EEADR. 2) Set RD (D0 bit of EECON) = 1. 3) Read the EEDATA register.
For example, read the E2PROM memory data at 25H:
…
BCF STATUS, RP0; select Bank0
MOVLW 25H
MOVWF EEADR; address 25H → EEADR
BSF STATUS, RP0; select Bank1
BSF EECON1, RD; start the read operation
BCF STATUS, RP0; select Bank0
MOVF EEDATA, W; read the E2PROM data
… into the W register
(2) E2PROM write operation
To perform an E2PROM write operation, perform the following steps:
1) put the E2PROM unit address into EEADR; 2) put the write data into EEDATA; 3) execute a control program segment.
For example: to write data 99H to unit 25H of E2PROM, the following program needs to be executed:
…
BCF STATUS, RP0; send Bank0
MOVLW 25H
MOVWF EEADR; address → EEADR
MOVLW 99H
MOVWF EEDATA; write data → EEDATA
BSF STATUS, RP0; select Bank1
BSF EECON1, WREN; write operation function is allowed
1 BCF INTCON, GIE; turn off the general interrupt
2 MOVLW 0x55
3 MOVWF EECON2
4 MOVLW 0xAA
5 MOVWF EECON2; operate EECON2
6 BSF EECON1, WR; start the write operation
7 BSF INTCON, GIE; open the general interrupt
...
Note: statements 2 to 6 in the above program must be strictly executed, otherwise the write operation of E2PROM cannot be started. Items 1 to 7 are the operations we recommend users to perform, that is, to turn off all interrupts in the E2PROM write operation sequence to prevent the sequence from being interrupted.
In addition, WREN (D2 bit of EECON1) is set to ensure that E2PROM will not be accidentally written, so in normal times, the user program should keep WREN=0 to prohibit write operations. WREN=1 is set only when E2PROM needs to be written, and it is restored to 0 after the write is completed. The user can only set WREN=1 to start the write operation after setting WREN=1. The WREN bit is automatically cleared after power-on reset.
The E2PROM write operation takes about 10ms to complete. The user program can determine whether the E2PROM write operation is completed by querying the status of the WR bit (when WR=0, it means the operation is completed), or using the E2PROM write completion interrupt. If you want to use the interrupt, you should first set EEIF (D6 of INTCON) to 1 to open the interrupt. The E2PROM write completion interrupt flag bit EEIF can only be cleared by software.