Design of a Presettable Programmable Broadband DC Power Amplifier Circuit Based on AVR Microcontroller

This paper uses AVR microcontroller ATmegal28 as the core controller, combined with 10-bit serial D/A chip TLC5615 , power amplifier THS3092, programmable gain amplifier AD603 and other related circuits to form a preset programmable broadband DC power amplifier circuit. The gain adjustment range of this circuit system is 0~60 dB, the step interval is 1 dB, the frequency band is DC~10 MHz, the output voltage effective value is 10 V, the matrix keyboard presets the gain value step, the dot matrix LCD displays the real-time voltage effective value, the human-machine interface is friendly, and the operation is simple and convenient.

1 System Overall Plan

If the idea of ​​programmable amplification is adopted and the input signal is used as the reference voltage of the high-speed D/A converter, then the D/A converter, as a programmable attenuator, has a very high speed requirement. At the same time, in order to achieve adjustable gain of 0 to 60 dB, the D/A converter output attenuation must be at least 60 dB. Assuming that the effective value of the signal source is less than 20 mV, it is 20 μV after attenuation. Such a small signal may be completely submerged by noise, or greatly increase the difficulty of signal conditioning.

Two AD603 voltage-controlled gain broadband amplifiers can also be used, each achieving a -10 to 30 dB gain. Through testing, it was found that the AD603 output contains a DC voltage that is independent of the gain. Since the project requires that the frequency can be extended to DC, that is, the DC cannot be isolated by capacitor coupling between stages, the DC bias of the front-stage AD603 output will seriously affect the amplification of the subsequent stage. This article uses one AD603, and the subsequent stage uses a multi-channel relay to switch the gain. The AD603 single chip achieves 10 to 30 dB amplification, and the subsequent stage follows the amplifier circuit with different fixed gains to achieve segmented continuous amplification, and finally achieves the purpose of continuous adjustable overall gain.

This design consists of small signal program-controlled amplification 10 dB amplification and zeroing, bandwidth filtering, post-stage power amplification, single-chip microcomputer and human-computer interaction circuits. The overall structure block diagram of the system is shown in Figure 1. The program-controlled amplification circuit uses a voltage control chip AD603 to achieve -10 to 30 dB amplification. The zeroing amplification circuit uses OPA690 to form a 10 dB in-phase amplifier and also serves as a static zeroing circuit. The broadband filtering circuit uses two 7th-order Butterworth low-pass filters to achieve DC to 5 MHz and DC to 10 MHz bandwidth limits respectively. The post-stage uses OPA690 and THS3092 to achieve 10 dB and 18dB fixed gain power amplification according to different situations. The ATmegal28 single-chip microcomputer controls the amplification factor of AD603 through the 10-bit serial D/A converter TLC5615, switches different filtering circuits by controlling the relay group to achieve different bandwidth limits, switches different amplification circuit channels to achieve segmented continuous amplification, and finally achieves continuous adjustment of the overall gain from 0 to 60 dB, and realizes human-computer interaction by controlling the keyboard and LCD display.

The gain of the programmable amplifier circuit is -10 to 30 dB, and the gains of the three-stage fixed gain amplifier circuit are 10 dB, 10 dB, and 18 dB respectively. When the gain of the desired amplifier is 0 to 35 dB, the signal only passes through the programmable amplifier, the first stage 10dB amplifier and zeroing circuit, and the bandwidth filter circuit, and then is output to the load; when the gain of the desired amplifier is 36 to 45 dB, the signal also passes through the second stage 10 dB amplifier circuit, and then is output to the load; when the gain of the desired amplifier is 46 to 60 dB, the signal passes through the programmable amplifier, the first stage 10 dB and zeroing circuit, the filter circuit, the second stage 10 dB amplifier circuit, the third stage 18 dB power amplifier circuit, and then is output to the load. Therefore, as long as the first-stage programmable amplifier circuit is continuously adjustable in 1 dB steps, after the relay group is switched, the signal can be output from the three fixed gain stages to achieve segmented continuous adjustment of 0-35 dB, 36-45 dB, and 46-60 dB gain, and the total gain step adjustment range covers 0-60 dB. This segmented design successfully solves the problem that a single or multiple voltage-controlled op amp is difficult to control and prone to oscillation when the control range is too wide, and reduces the difficulty of signal processing, thereby greatly shortening the R&D time. 2 System Hardware Design

2.1 Programmable Amplification and DC Bias Adjustment Circuit

The pre-stage controllable gain amplifier circuit uses the AD603 voltage-controlled operational amplifier. AD603 is a variable gain amplifier with high temperature stability, low noise and precision control. Its passband is 90 MHz, and the basic gain Gain (dB) = 40VG + 10. Among them, VG is the voltage-controlled input voltage, and the control voltage range is -0.5 ~ +0.5 V, so the amplifier is designed to have a gain of -10 ~ +30 dB. It can also be seen from this formula that the relationship between the logarithmic gain in dB and the control voltage is linear. As long as the microcontroller performs simple linear calculations, the logarithmic gain can be controlled, and the gain step can be achieved very accurately.

The 1 and 2 pins of AD603 are gain control differential voltage input terminals, with a maximum gain error of 0.5 dB. The voltage control voltage is provided by the 10-bit D/A converter TLC5615. The 2.5 V reference voltage of TLC5615 is provided by the precision adjustable voltage source TL431, with a maximum output voltage of 5 V and an output voltage resolution of 4.9 mV, so the resolution of AD603 is about 0.2 dB. Therefore, it is relatively easy to preset the gain step of 1 dB through the preset data table in the microcontroller. For the convenience of design, the 2 pin of AD603 is connected to a fixed voltage of 0.6 V in the actual design, and the voltage of the 1 pin is provided by the D/A converter DAC5615. Therefore, the voltage range of the output of DAC5615 is required to be 0.1~1.1 V, which can meet the requirements.

Ordinary broadband amplifiers generally do not include DC components, and the stages are coupled by capacitors, which can effectively avoid the mutual influence of the static operating points between the stages. This project requires that the signal frequency amplified by the amplifier can be extended to DC. Since the actual test found that the output of AD603 contains a DC voltage that is independent of the gain, it is necessary to set a DC bias adjustment circuit after AD603. The actual circuit is shown in Figure 2. The circuit uses the precision op amp OPA690 to form a common-phase proportional amplifier. Because the zero drift voltage of the previous stage circuit is positive, an adjustable DC bias needs to be added to the inverting input of the amplifier.

2.2 Bandwidth filter circuit

According to the needs of the project, two bandwidths, DC to 5MHz and DC to 10 MHz, were used in the design. Taking into account the intra-band gain fluctuation, phase characteristics, design difficulty, and the fact that passive filters have better performance than active filters in terms of high-speed and high-order filtering, the filter circuit is composed of discrete components LC, and a Butterworth low-pass filter with the smallest fluctuation in the passband is used. After testing, when the cutoff frequency of the 7th order is 5 MHz, the fluctuation in the 0-4 MHz band is less than 1 dB; when the cutoff frequency is 10 MHz, the fluctuation in the 0-9 MHz band is also less than 1 dB. The circuit diagram of the normalized 7th-order Butterworth low-pass filter is shown in Figure 3.

According to the formula, the filter component parameters can be calculated when the cutoff frequencies are 5 MHz and 10 MHz and the characteristic impedance is 50 Ω. Among them, L' and C' are the calculated values, L and C are the corresponding normalized data, and f is the cutoff frequency of the filter. The specific calculation results are listed in Table 1.

2.3 Power Amplifier Circuit

If discrete components are used, the use of high-power, high-speed triode push-pull output can make the amplifier's output power very high and the driving ability strong, but this circuit has serious temperature drift, which will seriously affect the output effect at low frequency and DC. If two op amps are connected to form in-phase and anti-phase amplification respectively, the signal can be taken out by differential, which can achieve a signal that is twice the output of the op amp, but this circuit has high requirements on the op amp phase, and the output signal is floating. If a dedicated high-voltage, high-drive current feedback integrated op amp chip is used, this project requires a wide frequency band, and the output current is large when the output voltage is high, and it is generally difficult to find such chips. In order to meet the project design requirements and further expand the output current, this article uses two identical current feedback op amps THS3092 in parallel output.

THS3092 is a dual-channel high-voltage low-distortion current feedback operational amplifier that can provide linear power amplification with a voltage of ±15 V, a maximum output current of 250 mA (2 pieces in parallel can reach 500 mA), a conversion rate of up to 5700 V/ns, and a bandwidth of 160 MHz when amplified by 6 dB, which can meet the design requirements of 10MHz bandwidth and high-speed systems. When the output voltage changes from 0V to 15V, its voltage conversion time is about 1ns, which can fully meet the requirements of high-frequency signal output without distortion.

The power amplifier circuit is shown in Figure 4. Two THS3092 chips are used to form a two-stage in-phase voltage amplifier circuit and a one-stage parallel output current expansion circuit. The gain of each amplifier circuit is A=R1/R2+1=2 times (6dB), 3 levels total 18dB, and the maximum output peak-to-peak voltage is 28V.

3 System Software Design

The system software mainly includes three parts: amplifier gain and cutoff frequency setting, gain calibration, and human-computer interaction. The system software flow is shown in Figure 5. After the program starts running, you can select gain calibration, voltage gain setting, cutoff frequency setting, etc. by pressing buttons.

4 System Test Analysis

After the system design is completed, in order to verify the indicators of the broadband DC power amplifier, the SKl731 DC regulated power supply, PM5139 20 MHz digital signal source, TDS1012 300 MHz digital oscilloscope, VC9806 4.5-digit digital multimeter, etc. are used to test the system's gain setting, gain fluctuation within the passband, bandwidth-frequency characteristics, output noise voltage, amplifier efficiency, etc.

4.1 Gain Test

Input a sine wave signal with an effective value of 10 mV and a frequency of 1 MHz, connect the output to a 50Ω load, and increase the amplifier gain from 0 dB in 1 dB steps. Use an oscilloscope to test the output voltage and calculate the gain error. The test shows that the output gain is continuously adjustable within 0 to 60 dB, the maximum gain error is 0.4 dB, and the maximum output effective value is 10.1 V.

4.2 Gain fluctuation test within the passband

Input a sine wave signal with an effective value of 10 mV, connect the output to a 50Ω load, set the amplifier gain to 60 dB, increase the input signal frequency from 0 Hz in steps of 1 MHz, test the output voltage with an oscilloscope, and calculate the gain error. The test shows that the maximum gain fluctuation in the 0-10 MHz frequency band is 0.5 dB.

4.3 Bandwidth frequency characteristics test

Input a sine wave with an effective value of 10 mV, connect the output to a 50 Ω load, set the amplifier gain to 60 dB, preset the cutoff frequencies to 5 MHz and 10 MHz, and increase the input signal frequency from 0 Hz in steps of 1 MHz. Use an oscilloscope to test the output voltage and calculate the gain error. The test results show that when the 5 MHz passband is preset, the gain attenuation at the 5 MHz band is 2.9 dB, and the maximum gain fluctuation is 0.5 dB within 0 to 4 MHz; when the 10 MHz passband is preset, the gain attenuation at the 10 MHz band is 2.8 dB, and the maximum gain fluctuation is 0.5 dB within 0 to 9 MHz.

4.4 Amplifier Efficiency Test

Input a sine wave with an effective value of 10 mV, connect the output to a 50 Ω load, adjust the amplifier gain to 60 dB, connect the positive and negative power supplies of the amplifier in series to a DC ammeter, and measure the effective value of the voltage across the load to be 10 V, the positive power supply current to be 0.133 A, and the negative power supply current to be 0.063 A. The efficiency can be calculated to be 68.0%.

4.5 Test Results Analysis

Through the above tests, it can be seen that the amplifier successfully solves the problem that existing amplifiers are difficult to take into account in broadband, DC, and power amplification, and fully meets the design requirements of the project. The reasons are as follows: when designing the amplifier power supply decoupling, a π-type inductor and capacitor network is used. This decoupling network has a good suppression effect on power supply noise in each frequency band; the PCB layout of the amplifier circuit is carefully considered, and partial copper is used instead of full copper, which reduces parasitic capacitance and makes the circuit work more stable; the signal transmission between circuit boards uses cables with high-frequency shielding wires to reduce signal crosstalk; the signal input end uses SMA head plus high-frequency shielding cover for signal connection, which enhances the system's anti-interference ability.

Conclusion

This paper combines the design scheme and existing problems of general amplifiers, discusses the detailed design method of each unit circuit of the programmable broadband DC power amplifier, and proposes the design scheme and implementation method of a programmable broadband DC amplifier with large dynamic range and low distortion. The test results show that the scheme has better solved the contradiction of key parameters of the amplifier such as gain, DC bandwidth, and power, and all the measured system indicators have met the design requirements.