Micro2440 LCD bare metal test

I have been working on the LCD of micro2440 in recent days and encountered many problems. I wrote them down today and also gave them as a reference for my colleagues who want to write, so that they can avoid detours.

First, let me explain the environment I use: ubuntu12.04, micro2440 (can be used for mini2440).

1. Preparation

Before writing the test program, we should first understand which registers need to be set for the LCD part of s3c2440. If we only look at the datasheet, we may not understand it very well. When I was learning, I combined Wei Dongshan's "Embedded Linux Application Development" and his video about LCD control. There are also some keywords involved, and you can understand the meaning of these words by combining the information of LCD.

The key words involved are listed below.               

VSYNC: Frame synchronization signal, indicating the start of scanning one frame. One frame is a picture displayed on the LCD.

HSYNC: Line synchronization signal, indicating the start of scanning line 1.

VDEN: data enable signal.

VD[23:0]: LCD pixel data output port.

VCLK: pixel clock signal.

Register parameters:

VSPW: The pulse width of the frame synchronization signal, the unit is 1 line time.

VFPD: The front shoulder of the frame synchronization signal, the unit is 1 line time.

VBPD: The back porch of the frame synchronization signal, the unit is 1 line time.

HOZVAL: screen width, set to 320 in micro2440

LINEVAL: screen height, set to 240 in micro2440

HBPD: The back shoulder of the horizontal synchronization signal, the unit is 1VCLK time.

HFPD: The front shoulder of the horizontal synchronization signal, the unit is 1VCLK time.

HSPW: Pulse width of the horizontal synchronization signal, in units of 1VCLK time

There are three important things, FCLK, HCLK, PCLK, these three are known after Baidu,

FCLK provides the clock signal for the CPU core. When we say that the CPU main frequency is 200MHz, it refers to this clock signal. Correspondingly, 1/Fclk is the CPU clock cycle.       

HCLK is the bus clock of AHB, including USB clock

PCLK: External IO interface clock, such as the serial port clock setting is derived from PCLK.

When we set them, they have such a relationship: PCLK: HCLK: FCLK = 1:4:8, that is, if FCLK (CPU main frequency) is 400M, then HCLK = 100M, PCLK = 50M. Of course, they have other relationships, such as 1:3:6. We usually use the previous one.

When the LCD is scanning, the data is not valid at the beginning, but it takes several invalid lines to reach the valid data. This is why black borders appear on the screen.

This is the result of the analysis by Mr. Wei Dongshan based on the timing diagram of S3C. It may not be clear, you can go and watch his video. Before, I was also not clear about the parameters of those registers. I was always struggling with how to get them. In fact, after knowing the principle, the LCD data sheet clearly stated it.

After knowing this basic knowledge, take a look at the registers of the LCD in s3c2440:

control:

functional module:

REGBANK is the register set of the LCD controller

LCDCDMA is a DMA channel dedicated to the LCD controller

TIMEGEN and LPC3600 are responsible for generating the control timing required by the LCD screen

Image information is sent from VD[23:0] to the LCD screen via VIDPRCS

For a detailed description of each register, please refer to the s3c2440 documentation, http://download.csdn.net/download/zhangjun1992/7062227

Among them, VSPW, VFPD, VBPD, HBPD, HFPD, HSPW, HOZVAL, and LINEVAL can be found in the LCD data sheet:

The corresponding typical value is TYP. According to the figure, the typical value of each one is:

VSPW=2, VFPD=2, VBPD=2, HBPD=20, HFPD=10, HSPW=10; this value is the value recommended by the LCD data sheet, but it was not used in the actual test. I changed it according to the information written by others:

Programming steps:

First, we need to look at the LCD interface circuit diagram on our board to see if we need to set the power enable. For example, in mirco2440, the LCD does not have power enable control, it has the stc12e 51 core microcontroller on the LCD to complete it. These can be seen in the corresponding circuit diagram.

2. Initialize IO pins,

For the IO pin settings, please refer to the GPIO section in the 2440 data sheet.

3. Set the LCD frequency

The LCD datasheet usually has a recommended frequency. For example, the recommended frequency of the screen I use is 6.4M. I need to select a suitable CLKVAL through some calculations to generate this frequency:

For TFT LCD, the calculation formula of VCLK provided by S3C2440 is:

VCLK = HCLK / ((CLKVAL+1)*2)

It can be concluded that:

CLKVAL = HCLK / (VCLK * 2) - 1

My HCLK is 100Mhz (CPU runs at 400Mhz, CLKDIV_VAL is set to 5, PCLK:HCLK:FCLK = 1:4:8), VCLK uses the 6.4M recommended by the screen, and I get:

CLKVAL = 100000000 / (6400000 * 2) - 1 = 6.8

Select the nearest integer value 7 and write it to LCDCON1:17-8.

(VCLK is actually calculated based on the number of frames per second * the number of frame lines * the number of pixels per line. The number of frame lines and the number of pixels per line need to include the number of blanks and synchronizations.)

4. Initialization of LCD registers:

I will note the meaning of each parameter in the program. You can see the program in the attached file. When setting the polarity of VCLK, VLINE, VFRAME and other signals (rising edge or falling edge), you need to check the LCD datasheet one by one, because sometimes the default setting of 2440 is falling edge, but some LCDs are rising edge. This is the case in mirco2440.

5. Disable LPC3600/LCC3600 mode!

If you are not using the Samsung LPC3600/LCC3600LCD, you must disable the LPC3600/LCC3600 mode (write 0 to TCONSEL)!

6. Open video output

ENVID is set to 1 (LCDCON1:0 is written to 1)

Now you roughly know how to write LCD. I put the program I wrote in my resources, and there is a "cankao" directory in it. It was shared by a good person in the arm home forum https://github.com/kangear/MINI2440-NO_OS/tree/master/14.lcd/debug_release. But his program was compiled under eclipse, and mine was written under linux. There are two in total. The programs are a little different in implementing data display. One directly gives the address of the video memory, and the other defines a two-dimensional array and assigns the first address of the two-dimensional array to the first address of the video memory. boot.bin is the file I have compiled. Download it to nor and run it. Do not download it to nand. Download the program

Reference: http://blog.chinaunix.net/uid-21410064-id-167700.html

http://blog.csdn.net/wzw12315/article/details/6223189