1 Basic principles
2 Implementation Code
The code is mainly written based on FIGURE 5-1 and the logic block diagram of the interrupt, so that the code is highly readable and easy to understand. However, some registers may not be explained in the block diagram, so you also need to carefully read the official document of Timer 0, that is, the basic principle part.
/*----------------Function function:
Interrupt Timer 0
--------------------------*/
#include //#include"delay.h"//Call the delay sub-function __CONFIG(0xFF32); //Chip configuration word, watchdog off, power-on delay on, power-off detection off, low voltage programming off //__CONFIG(HS&WDTDIS&LVPDIS); /*-----------Macro definition--------------*/ #define uint unsigned int #define uchar unsigned char #define V0 RD0 uint i; /*-----------Sub-function declaration--------------*/ /*-----------Main function--------------*/ void main() { TRISD=0xfe; //Set data direction RD7-RD1 as input, RD0 as output PORTD=0X00; //Assign initial value to port /********Timer TMR0 initialization**********/ // Timer mode is selected by clearing bit T0CS. Timer mode is selected by clearing bit T0CS (T0CS=0). // In Timer mode, the Timer0 module will increment every instruction cycle (without prescaler). // Counter mode is selected by setting bit T0CS. Counter mode is selected by setting T0CS bit (T0CS=1). // In Counter mode, Timer0 will increment either on every rising or falling edge of pin RA4/T0CKI // The incrementing edge is determined by the Timer0 Source Edge Select bit, (T0SE=1). // Clearing bit T0SE selects the rising edge. In counter mode, you need to select the rising edge (T0SE=0) or the falling edge (T0SE=1) trigger; T0CS=0; //TMR0 clock source selection bit If T0CS=0, the clock source of TMR0 selects the internal instruction cycle (fosc/4) // The following two lines of statements select the rising edge trigger in counter mode //T0CS=0; //Counter mode //T0SE=0; //Rising edge trigger // There is only one prescaler available which is mutually exclusively shared between // the Timer0 module and the Watchdog Timer. // The PSA and PS2:PS0 bits determine the prescaler assignment and prescale ratio. //Don't use prescaler //PSA=1; //The prescaler is assigned to WDT (watchdog), that is, 1:1 frequency division. At this time, PS0~PS2 are invalid //To prescale the frequency, the following four instructions replace the above one instruction PSA=0; //Prescaler allocation bit PS0=0; //Pre-scaling 1:8, the corresponding codes of the three bits are 010 PS1=1; // Eight system clocks, the value of the counter register +1 PS2=0; //8-bit counter register initial value //The TMR0 interrupt is generated when the TMR0 register overflows from FFh to 00h. // Timing 2000us = 250us*8 (eighth frequency division), initial value TMR0 = 256-(250-13) = 19 = 0x13. Originally TMR0 should be 256-250. Why add 13 pulses? // Where does 13 come from? 13=8+2+3. 8: interrupt context protection and other statements consume a total of 8 instruction cycles; 2: cycle latency; 3: interrupt response time. // The system clock is running automatically all the time. It will take 2000 system clocks for the count register to be full. At this time, T0IF=1. If T0IF=0, T0IF will generate a rising edge, that is, an interrupt will be generated. TMR0=0x13; //8-bit counting register // This overflow sets bit TMR0IF(T0IF). T0IF=1 indicates that the count register has overflowed. T0IF=0; //The overflow interrupt flag of TMR0 is cleared, so that when the count register is full, T0IF generates a rising edge. //The interrupt can be masked by clearing bit TMR0IE(T0IE). T0IE=1; //Interrupt enable control position 1 //******************** Open global interrupt settings //Timer T0 is set to enable interrupts, and global interrupts need to be enabled here GIE=1; //Interrupt total enable control position 1 while(1) // infinite loop, after the microcontroller is initialized, it will keep running this infinite loop { } } /*************Interrupt service routine***************/ void interrupt ISR(void)//All interrupts of PIC microcontrollers have such an entry { // The TMR0 interrupt is generated(T0IF==1) when the TMR0 register overflows from FFh to 00h. // When the counter register changes from all 1 to all 0, T0IF==1. if(T0IF==1) //need to further determine whether it is T0 interrupt { //After the timer is interrupted, reset the initial value to prepare for the next interrupt TMR0=0x13; // Bit TMR0IF must be cleared in software by the Timer0 module Interrupt Service Routine // before re-enabling this interrupt. Explains why it is cleared // Overflow interrupt flag cleared. An interrupt will only occur when a rising edge appears on T0IF, so it must be cleared after the interrupt occurs. T0IF=0; //Execute the interrupt handler, that is, the interrupt occurs, what function do we want to execute if(++i>250) //2ms interrupt once, then count 250 times to get 500ms { i=0; V0=!V0; // Invert to achieve one second flashing } } } Why are there the following two lines of statements? This is determined by the interrupt, as shown in the figure below. T0IE=1; //TMR0IE interrupt enable control bit 1 GIE=1; //Interrupt total enable control position 1
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