ULINK2 JTAG/SWD interface
How is the ULINK2 interface defined?
The following is the definition of the ULINK2 interface:
The following is the standard interface arrangement:
ST-Link SWIM & JTAG/SWD interfaces
The following is the standard interface arrangement:
ST-Link specified standard interface
J-Link JTAG/SWD interface
How is the J-Link interface defined? |
The following is the standard interface arrangement:
Standard interface specified by J-Link
JTAG pin diagram:
1. Differences between SWD and traditional debugging methods
1. SWD mode is more reliable than JTAG in high-speed mode
2. When one GPIO is missing, you can use SWD emulation, which supports fewer pins.
3. When the size of the board is limited, it is recommended to use SWD mode
2. Emulator support for SWD mode
1. Support of SWD mode by common emulators on the market
JLINKV8 supports SWD simulation mode very well, and the speed can reach 10M
ULINK2 supports SWD mode very well, and the speed can reach 10M
2. Differences in SWD hardware interface
(1) The hardware interfaces required by JLINKV7 are: GND, RST, SWDIO, SWDCLK
(2) The hardware interfaces required by JLINKV8 are: VCC, GND, RST, SWDIO, SWDCLK (Note: Below are my actual connections and corresponding experimental results using JLINKV8)
(3) ULINK1 does not support SWD mode
(4) The hardware interfaces required by ULINK2 are: GND, RST, SWDIO, SWDCLK
3. Setting SWD mode in MDK
Normal JTAG requires 20 pins, while J-Link's SWD only needs 2 wires (PA13/JTMS/SWDIO, PA14/JTCK/SWCLK) (plus the power line, it's 4), which saves 3 I/O ports (PA15/JTDI, PB3/JTDO, PB4/JNTRST) for other use, and can save some board space (only 4 ports are needed)
first step:
Step 2:
In addition, the JTAG pins can be reused as IO ports, but in this case, JLINK cannot connect to the chip. There are two solutions:
(1) Write another program, do not reuse JTAG as an I/O port, and then write this program into the chip using the serial port tool.
(2) Set BOOT0/BOOT1 to boot from internal RAM. Then the program in FLASH will not be executed after power-on, so JLINK can successfully "take over" the JTAG pins.
With the launch of the Cortex series by ARM, SWD debugging has become everyone's first choice. SWD is not only comparable in speed to JTAG, but also uses far fewer debugging lines. When debugging with SWD, many people generally use 4 lines:
① VCC - Power supply
② GND - Ground
③ SWDIO - Data
④ SWCLK - Clock
When downloading NXP's LPC1114, both ULINK2 and JLINK V8 are available. However, for STM32, if JLINK V8 is used, the download is possible, but if ULINK2 is used, the download always times out. However, if the NRESET reset line is added, the download is possible. Therefore, in order to be compatible with all chips and debugging tools, it is best to reserve the interface in the following way:
PIN 1: GND
PIN 2: NRST
PIN 3: VCC
PIN 4: SWDIO
PIN 5: SWDCLK
Of course, sometimes only three lines are needed, but this is unstable for some chips:
PIN 1: GND
PIN 2: SWDIO
PIN 3: SWDCLK
So you can also use the following method:
1 - VCC;
2 - GND;
3 - SWDCLK;
4 - SWDIO;
5 - NRST.
The three wires in the middle are required, NRST can be added or not. Some people say that VCC can be added to power the output interface chip ALVC164245 of JLink.
Previous article:UART0 serial port programming (IV): The crisis of UART0 serial port programming in UC/OS-II
Next article:ARM Assembly: BNE and TST and BEQ
Recommended ReadingLatest update time:2024-11-16 12:46
Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
- Innolux's intelligent steer-by-wire solution makes cars smarter and safer
- 8051 MCU - Parity Check
- How to efficiently balance the sensitivity of tactile sensing interfaces
- What should I do if the servo motor shakes? What causes the servo motor to shake quickly?
- 【Brushless Motor】Analysis of three-phase BLDC motor and sharing of two popular development boards
- Midea Industrial Technology's subsidiaries Clou Electronics and Hekang New Energy jointly appeared at the Munich Battery Energy Storage Exhibition and Solar Energy Exhibition
- Guoxin Sichen | Application of ferroelectric memory PB85RS2MC in power battery management, with a capacity of 2M
- Analysis of common faults of frequency converter
- In a head-on competition with Qualcomm, what kind of cockpit products has Intel come up with?
- Dalian Rongke's all-vanadium liquid flow battery energy storage equipment industrialization project has entered the sprint stage before production
- Allegro MicroSystems Introduces Advanced Magnetic and Inductive Position Sensing Solutions at Electronica 2024
- Car key in the left hand, liveness detection radar in the right hand, UWB is imperative for cars!
- After a decade of rapid development, domestic CIS has entered the market
- Aegis Dagger Battery + Thor EM-i Super Hybrid, Geely New Energy has thrown out two "king bombs"
- A brief discussion on functional safety - fault, error, and failure
- In the smart car 2.0 cycle, these core industry chains are facing major opportunities!
- The United States and Japan are developing new batteries. CATL faces challenges? How should China's new energy battery industry respond?
- Murata launches high-precision 6-axis inertial sensor for automobiles
- Ford patents pre-charge alarm to help save costs and respond to emergencies
- New real-time microcontroller system from Texas Instruments enables smarter processing in automotive and industrial applications
- [Project source code] AHT10 temperature and humidity sensor experiment based on FPGA
- Transformer and Inductor Design Handbook (4th Edition)
- Based on PSOC6 development board simulation I2C solution X-NUCLEO-IKS01A3 LSM6DSO
- Ripple test
- Top 5 most popular blog posts in 2019 - Helping 5G development
- DDS signal source based on FPGA
- Integer square root algorithm
- Combining the new 6-axis IMU with DSP to achieve high-performance motion tracking accuracy
- Six design issues for I2C isolators
- Common problems and solutions in CCS compilation