STM32F103 external crystal oscillator changed from 8M to 12M-EEWORLD

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In the official library file, HSE (external high-speed clock) defaults to 8MHz, and the highest main frequency is 8*9=72MHz. If HSE is changed to 12MHz without modifying the library file, the highest main frequency becomes 12*9=108MHz. The most typical problem is that USART can communicate, but the received data is inconsistent with the sent data, and I can't find the reason. It made me toss around for a whole day. The following are the places that need to be modified.

1. Modify HSE_VALUE in stm32f10x.h. The original code is as follows:

#if !defined HSE_VALUE
#ifdef STM32F10X_CL
#define HSE_VALUE ((uint32_t)25000000)
#else
#define HSE_VALUE ((uint32_t)8000000)
#endif
#endif

The modified version is as follows:

#if !defined HSE_VALUE
#ifdef STM32F10X_CL
#define HSE_VALUE ((uint32_t)25000000)
#else
#define HSE_VALUE ((uint32_t)12000000)
#endif
#endif

2. Modify the clock configuration in system_stm32f10x.c. First find void SystemInit(void)---》SetSysClock()---》SetSysClockTo72(), change the 9x frequency to 6x frequency, 12*6=72MHz. The original code is as follows:

#ifdef STM32F10X_CL
RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
RCC->CR |= RCC_CR_PLL2ON;
while((RCC->CR & RCC_CR_PLL2RDY) == 0)
{
}
RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 |
RCC_CFGR_PLLMULL9);
#else
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);
#endif

The modified version is as follows:

#ifdef STM32F10X_CL
RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
RCC->CR |= RCC_CR_PLL2ON;
while((RCC->CR & RCC_CR_PLL2RDY) == 0)
{
}
RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 |
RCC_CFGR_PLLMULL9);
#else
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6);
#endif

Keywords：STM32F103 Reference address：STM32F103 external crystal oscillator changed from 8M to 12M

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