Tip 5 -- Hardware structure of MCS-51 series microcontrollers

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1. Memory configuration:

【51】Technique 6 -- Hardware composition of MCS-51 series microcontrollers - Sakigan no Fate - Hajime no Ichibu

Note 1: RAM stores data, ROM stores programs;

Note 2: The EA pin of the microcontroller controls the selection of internal or external memory. 
    EA = 1: Use the internal ROM to store the program. 
    EA = 0: Use the external ROM to store the program.

Note 3: The program starts at 0000H. When using the "on-chip 4K ROM", if the program exceeds 4K (0FFFH), even if EA = 1, the program will be transferred to the "off-chip ROM" 1000H to start execution.

 

2. Hardware composition of on-chip ROM program memory:

There is no special note, but the following address units have special uses and programmers cannot use them casually:

0000H unit: the unit pointed to by the program counter PC at power-on
0003H unit: the entry address of external interrupt/INT0
000BH unit: the entry address of overflow interrupt of timer T0
0013H unit: the entry address of external interrupt/INT1
001BH unit: the entry address of overflow interrupt of timer T1
0023H unit: the entry address of interrupt for serial port receiving and transmitting

 

3. Hardware composition of on-chip RAM data memory:

The on-chip RAM data memory has 256B, the lower 128B is for general registers, bit addressing area, etc., and the upper 128B is for special function registers SFR

Note 1: The 256B here refers to the data of a certain type of microcontroller. For example, the STC89C54RD+ used by the blogger has 1280B of on-chip RAM.

【51】Technique 6 -- Hardware composition of MCS-51 series microcontrollers - Sakigan no Fate - Hajime no Ichibu

 

To be continued…

Reference address:Tip 5 -- Hardware structure of MCS-51 series microcontrollers

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