ARM processor SWI abnormal interrupt response process

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   Through the SWI exception interrupt instruction, the application in user mode can call the code in system mode, which is manifested as a system call in the operating system.
How is this process implemented? Let's learn with questions!

    The SWI instruction includes a 24-bit immediate value (interrupt call number), which indicates the specific call function that the user wants to request. Therefore, in the SWI exception interrupt, the interrupt call number must be read, and then the corresponding handler is called according to the interrupt number. This process can be divided into two steps:

1. SWI exception interrupt handler
Since it is operated at the bottom level, this exception interrupt handler must be written in assembly language, as described below:

area top_swi code readonly
export swi_headler
swi_headler
stmfd sp!, {r0-r12, lr} ; Save the register values ​​from r0 to r12, lr
ldr r0, [lr, #-4] ; Get the address of the SWI instruction from the memory
bic r0, r0, #FF000000 ; Read the 24-bit interrupt call number
mov r1, sp
;===================================================
bl swi_service_func ; Call the function service function, see below
                                            ; The interrupt call number is passed in through the r0 register
                                            ; Parameters are passed in through register r1
;==================================================
ldmfd sp!, {r0-r12, pc}^ ; Restore r0 to r12 before the call, and leave the interrupt handler
end

2. Function service program
Write Using the interrupt call number obtained from the interrupt handler, we can write the following service function (for simplicity, we use C language)
void swi_service_func(unsigned int number, unsigned int *reg)
{
    unsigned int reg1, reg2, reg3, reg4;
    //Get the parameters passed in before SWI
    reg1 = reg[0];
    reg2 = reg[1];
    reg3 = reg[2];
    reg4 = reg[3];
    switch (number) {
        case 0:
            // do something
        break;
        
        case 1:
            // do something
        break;
        .
        .
        .
        case n:
            // do something
        break;
        
        default:
            // do something
        }
    }
    // Store the updated result in r0-r3
    reg[0] = updata_reg1;
    reg[1] = updata_reg2;
    reg[2] = updata_reg3;
    reg[3] = updata_reg4;
}

In this way, as long as the call break number is different, different function calls can be implemented. Isn’t it simple?
Keywords:ARM Reference address:ARM processor SWI abnormal interrupt response process

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