Knowledge points related to 51 single chip microcomputer expansion

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These days, I'm working on a project that uses external RAM expansion, and I'm really ashamed that I don't know a lot of basic knowledge points. Now I write down the things I don't know, make a note, and share it with you, so that I can learn some knowledge and develop better products.

1. The keyword _at_ in the microcontroller: defines the storage address of the variable.

2. What does this procedure mean?

  1. #define XBYTE((char*)0x20000L)
  2. XBYTE[0x8000]=0x41;

define XBYTE ((char*)0x20000L) defines XBYTE as a character pointer (or array) variable pointing to address 0x0000L XBYTE[0x8000]=0x41; assigns the value of 0x8000 in the array XBYTE to 0x41. That is, the memory unit at address 0x8000L is assigned 0x41. This means that you are using a 51 chip with an external data bus. The external memory is mostly RAM, and the capacity of RAM is at least 0x8000 (32k) bytes. The capacity of RAM may be 64k bytes? L stands for long, which means that 0x20000L is a long integer. Generally speaking, for 8-bit microcontrollers such as 51, integers are represented by 16-bit binary and long integers are represented by 32-bit binary. The 2 in 0x20000L is the memory type xdata, not part of the address.

3.51 MCU storage type:

data--->addressable on-chip ram
bdata--->bit-addressable on-chip ram
idata--->addressable on-chip ram, allowing access to all internal ram
pdata--->paged addressable off-chip ram (MOVX @R0) (256 BYTE/page)
xdata--->addressable off-chip ram (64k address range)
code--->program storage area (64k address range), corresponding to MOVC @DPTR

4.absacc.h

  1. /*------------------------------------------------ --------------------------
  2. ABSACC.H
  3.  
  4. Direct access to 8051, extended 8051 and Philips 80C51MX memory areas.
  5. Copyright (c) 1988-2002 Keil Elektronik GmbH and Keil Software, Inc.
  6. All rights reserved.
  7. -------------------------------------------------- --------------------------*/
  8.  
  9. #ifndef __ABSACC_H__
  10. #define __ABSACC_H__
  11.  
  12. #define CBYTE ((unsigned char volatile code *) 0)
  13. #define DBYTE ((unsigned char volatile data *) 0)
  14. #define PBYTE ((unsigned char volatile pdata *) 0)
  15. #define XBYTE ((unsigned char volatile xdata *) 0)
  16.  
  17. #define CWORD ((unsigned int volatile code *) 0)
  18. #define DWORD ((unsigned int volatile data *) 0)
  19. #define PWORD ((unsigned int volatile pdata *) 0)
  20. #define XWORD ((unsigned int volatile xdata *) 0)
  21.  
  22.  
  23. #ifdef __CX51__
  24. #define FVAR(object, addr) (*((object volatile far *) (addr)))
  25. #define FARRAY(object, base) ((object volatile far *) (base))
  26. #define FCVAR(object, addr) (*((object const far *) (addr)))
  27. #define FCARRAY(object, base) ((object const far *) (base))
  28. #else
  29. #define FVAR(object, addr) (*((object volatile far *) ((addr)+0x10000L)))
  30. #define FCVAR(object, addr) (*((object const far *) ((addr)+0x810000L)))
  31. #define FARRAY(object, base) ((object volatile far *) ((base)+0x10000L))
  32. #define FCARRAY(object, base) ((object const far *) ((base)+0x810000L))
  33. #endif
  34.  
  35. #endif

For example:
rval = CBYTE [0x0002]; points to the address 0002h of the program memory
rval = XWORD [0x0002]; points to the address 0004h of the external RAM // WORD is a word, two bytes, so it is 0004h

#define COM8255 XBYTE[0X060FF] //If COM8255 appears later, the MCU ports P0 and P2 will jointly output the absolute physical address of 0X060FF (the address points to the 82C55 instruction register)
#define PA8255 XBYTE[0X000FF] //If PA8255 appears later, the MCU ports P0 and P2 will jointly output the absolute physical address of 0X000FF (the address points to the 82C55 group A port register)
#define PB8255 XBYTE[0X020FF] //If PB8255 appears later, the MCU ports P0 and P2 will jointly output the absolute physical address of 0X020FF (the address points to the 82C55 group B port register)
#define PC8255 XBYTE[0X040FF] //If PC8255 appears later, the MCU ports P0 and P2 will jointly output the absolute physical address 0X040FF (the address points to the C group port register of 82C55)

4. Routine to drive external RAM

  1. /****************************************************** *************************
  2. *Program name: 51 MCU external expansion RAM test
  3. *Program function: write data to the external RAM, read data from the external RAM, and light up the 8 LEDs of port P1
  4. * Development tools: WSF-51DB development board
  5. * MCU model: AT89S52-24PU
  6. *Clock frequency: 12MHZ
  7. *Program author: Master Wu
  8. *Copyright statement: All rights reserved by Master Wu. Please indicate the source address and author when reprinting.
  9. *************************************************** ************************/
  10. #include
  11. #include //Contains the absolute address access function of the off-chip storage space: XBYTE[]
  12. sbit oe=P2^7; //External RAM chip select and address latch 74HC573 enable
  13. unsigned char code ramdata[100]= //define 100 data
  14. {
  15. 0,1,2,3,4,5,6,7,8,9,
  16. 10,11,12,13,14,15,16,17,18,19,
  17. 20,21,22,23,24,25,26,27,28,29,
  18. 30,31,32,33,34,35,36,37,38,39,
  19. 40,41,42,43,44,45,46,47,48,49,
  20. 50,51,52,53,54,55,56,57,58,59,
  21. 60,61,62,63,64,65,66,67,68,69,
  22. 70,71,72,73,74,75,76,77,78,79,
  23. 80,81,82,83,84,85,86,87,88,89,
  24. 90,91,92,93,94,95,96,97,98,99
  25. };
  26. //Delay ms function:
  27. void Delayms(unsigned int t)
  28. {
  29. unsigned int i,j;
  30. for(i=t;i>0;i--)
  31. for(j=120;j>0;j--);
  32. }
  33.  
  34. //Main function:
  35. int main(void)
  36. {
  37. unsigned char i;
  38. oe=0; //Enable RAM chip select and address latch
  39. for(i=0;i<100;i++)
  40. XBYTE[300+i]=ramdata[i];
  41. //Write 100 data into the off-chip RAM, starting at address: 300
  42. while(1)
  43. {
  44. for(i=0;i<100;i++)
  45. {
  46. P1=XBYTE[300+i]; //Read data from the off-chip RAM and light up the 8 LEDs of port P1
  47. Delayms(500);
  48. }
  49. }
  50. return 0;
  51. }
  52.  
Reference address:Knowledge points related to 51 single chip microcomputer expansion

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