ARM Cortex-M3 Study Notes (4-5)

Publisher:Harmonious222Latest update time:2016-05-06 Source: eefocusKeywords:ARM  Cortex-M3 Reading articles on mobile phones Scan QR code
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I'm studying ARM Cortex-M3 recently, and I found a book called "An Definitive Guide to The ARM Cortex-M3" which is considered a classic. This series of study notes is actually the reading notes I made while studying this book.

Barrier directive

DMB, DSB, ISB

The differences between these three instructions are shown in the following table.

 

Command name

Functional Description

DMB

Data memory isolation. The DMB instruction ensures that: The memory access operation following it is committed only after all the memory access operations preceding it are completed.

DSB

Data synchronization isolation. Stricter than DMB: The instruction after it is executed only after all the memory access operations before it have been completed (that is, any instruction must wait for the memory access operation - translator's note)

ISB

Instruction synchronization isolation. The most stringent: it will flush the pipeline to ensure that all instructions before it are executed before executing the instructions after it.

 

Some other useful commands

There are many instructions supported by Cortex-M3. It is impossible to introduce all of them here. Below I will introduce a few instructions that I think are more distinctive.

 

REV, REVH, REV16 and REVSH

REV reverses the byte order in a 32-bit integer, while REVH reverses the byte order in half-word units and only reverses the lower half-word.

REVSH is based on REVH and also sign-extends the converted half-word.

 

These instructions are mainly used for byte order conversion when big-endian and little-endian systems communicate with each other.

 

RBIT instruction

RBIT is bit-reversed, which is equivalent to rotating the binary representation of a 32-bit integer horizontally by 180 degrees. Its format is:

RBIT.W Rd, Rn

When I saw the bitwise reversal, I thought of the butterfly operation of FFT calculation, which is where this kind of instruction is most needed.

 

TBB, TBH instructions

It can be used for the assembly of switch case structures in C language. The specific usage is not introduced in detail here, so you can read the book if you need it.

Keywords:ARM  Cortex-M3 Reference address:ARM Cortex-M3 Study Notes (4-5)

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