arm assembly instruction--LDR

LDR {condition}   destination register     

Function: Transfer 4 consecutive bytes (1 word) of data at the address pointed to by the memory address to the destination register.

The addressing mode of the LDR instruction is relatively flexible, as shown below:

LDR R0, [R1]                                                       ; read the word data at memory address R1 into register R0.

LDR R0, [R1, R2]                                             ; read the word data at memory address R1+R2 into register R0.

LDR R0, [R1, #8]                                             ; read the word data at memory address R1+8 into register R0.

LDR R0, [R1], R2                                               ; read the word data at memory address R1 into register R0, and store the value of R1+R2 into R1.

LDR R0, [R1], #8                                                ; read the word data at memory address R1 into register R0, and store the value of R1 + 8 into R1.

LDR R0, [R1, R2]!;                                          Read the word data at memory address R1+R2 into register R0, and store the value of R1+R2 into R1.

LDR R0, [R1, LSL #3]                                    ; read the word data at memory address R1*8 into register R0.

LDR R0, [R1, R2, LSL #2]                         ; read the word data at memory address R1+R2*4 into register R0.

LDR R0, [R1,,R2, LSL #2]!                       ; Read the word data at memory address R1+R2*4 into register R0, and store the value of R1+R2*4 into R1.

LDR R0, [R1], R2, LSL #2                            ; read the word data at memory address R1 into register R0, and store the value of R1+R2*4 into R1.

LDR R0, Label                                                ; Label is the program label, and Label must be within the range of -4~4KB of the current instruction.

 

To be careful of

LDR Rd, [Rn], #0x04                                                              ; here Rd is not allowed to be R15.

 

In addition, the instruction format of LDRB is similar to that of LDR, except that it reads 8 bits (1 byte) in the memory address into the destination register.

The instruction format of LDRH is also similar to that of LDR, which reads 16 bits (half word) from the memory into the destination register.

 

LDR R0, = 0xff

Here LDR is not an ARM instruction, but a pseudo-instruction. This is very similar to MOVE, except that the immediate value after the MOV instruction is limited. This immediate value must be a number in the range of 0X00-OXFF that is shifted right an even number of times, so MOV is more difficult to use because some numbers are not so easy to see whether they are legal.