1 Introduction
In order to prevent traffic accidents, when the intelligent detection device of the car detects danger ahead, it must send a warning message to the driver. The voice alarm clearly reminds the driver of the danger so that the driver can take timely and accurate measures. Therefore, this paper proposes digital voice processing technology, which first collects and stores the alarm information of various conditions digitally. When encountering danger, it will judge the type of danger and automatically select the stored alarm information to play. Due to the large amount of voice information, direct storage requires a huge storage space. For this reason, this paper uses FPGA to implement the ADPCM (Adaptive Differential Pulse Code Modulation) codec design to compress and store the voice information. Thus, the amount of stored information is doubled.
2 System Structure and Principle
This system design is based on the single-chip microcomputer and FPGA. The single-chip microcomputer controls the working state of the system, starts recording and playback, and counts and displays the recording and playback time. The FPGA compresses, stores, and decompresses the collected data. The single-chip microcomputer and FPGA work in coordination to improve the working efficiency and stability of the system. The system structure is shown in Figure 1.
First, the various alarm sounds that are expected to be collected are converted into digital signals by the A/D converter through the forward channel (microphone, differential amplifier, filter, adder) and sent to the FPGA for ADPCM compression encoding processing, and then stored in the static memory SRAM. When encountering danger, the microcontroller judges the danger, controls the FPGA to take out the corresponding voice data from the SRAM and decode it, and then sends it to the 8-bit D/A converter to convert it into an analog signal, and then reproduces the alarm sound through the backward channel (filter, correction circuit, power amplifier, speaker).
3 Main hardware design of the system
3.1 Preamplifier The
electret microphone is used to collect the voice signal and convert its signal amplitude into an electrical signal of millivolt level. When the system front stage processes it, the signal-to-noise ratio at the input end of the amplifier should be increased as much as possible to ensure that the amplifier circuit has accurate and stable gain. To this end, this paper designs the detection amplifier circuit shown in Figure 2. The circuit uses a voltage follower in the front stage, which uses the characteristics of infinite input resistance and zero output to provide high input resistance and realize impedance transformation and isolation; the back stage uses a differential amplifier to obtain a higher common mode rejection ratio and enhance the circuit's anti-interference ability.
The voltage follower is composed of the excellent low-noise audio amplifier NE5532, with an operating voltage of 12 V and an operating bandwidth of 10 MHz, which is particularly suitable for voice information processing. The differential amplifier is implemented using AD620. AD620 is actually a differential amplifier inside, with small offset voltage and current and high common mode rejection ratio. Therefore, it has excellent performance in processing weak signals, that is, amplification and noise elimination. Its gain G=1+(49.4 kΩ/Rg) (Rg is the resistor connected between pins 1 and 8). Adjust the potentiometer R1 so that the amplitude of the amplified signal is between -2.5 V and 2.5 V, which is convenient for A/D converter sampling and quantization.
3.2 Bandpass filter
The voice signal is easy to pick up noise after amplification and transmission, so before data collection, it is necessary to filter out the out-of-band clutter through a bandpass filter. The human voice frequency range is 300 Hz to 3.4 kHz, so the passband range of the filter should be 300 Hz to 3.4kHz. Such a wide frequency band must be achieved by cascading the low-pass part and the high-pass part.
High-pass filter design indicators: passband cutoff frequency fp = 300Hz, passband maximum allowable attenuation αp ≤ 3 dB; to eliminate power frequency interference, the stopband cutoff frequency fs = 50 Hz is determined, and the stopband minimum allowable attenuation as>40 dB. Two-stage second-order Butterworth high-pass filters are selected to be cascaded. The simulation results are shown in Figure 3.
The design index of the low-pass filter is: passband cutoff frequency fp = 3 400 Hz, the maximum attenuation allowed in the passband αp ≤ 3 dB; to suppress sampling aliasing distortion, the stopband cutoff frequency fs = 4 000 Hz is determined, and the minimum attenuation allowed in the stopband as ≥ 40 dB. Since the elliptic filter can obtain a narrower transition bandwidth than other filters, it is suitable for this system design. The fifth-order elliptic low-pass filter circuit is obtained by using the filter auxiliary design software Filter Wiz Pro as shown in Figure 4, and the simulation results are shown in Figure 5. By
cascading high-pass and low-pass filters, a 300 Hz ~ 3.4 kHz bandpass filter can be obtained. Experiments show that the filter has a good effect and meets the design index. The design of the bandpass filter of the backward channel is the same. [page]
4 System software design
4.1 FPGA part
Altera's Cyclone series EPlC6Q-240C8 is selected to implement the ADPCM encoder and decoder. The device contains 120,000 typical gate resources, 5,980 logic units, 6 RAM modules, 92,160-bit RAM or ROM, 2 digital PLLs, 185 programmable I/O ports, and the highest working clock can reach more than 300 MHz. It can be configured in the system through the JTAG interface.
ADPCM is a waveform coding technology that uses the high correlation between samples and the quantization order to adaptively compress data. ADPCM combines the adaptive characteristics of APCM and the differential characteristics of DPCM. Its core idea is to use adaptive changes in the size of the quantization order, that is, to use a small quantization order to encode a small difference, and to use a large quantization order to encode a large difference; use the past sample value to estimate the predicted value of the next input sample, and the difference between the actual sample value and the predicted value is always the smallest. The input signal of ADPCM codec is G.711 PCM code. If the sampling frequency is 8 kHz and each code is 8 bits, its data rate is 64 Kb/s, and the output code of ADPCM is the output of "adaptive quantizer", which is a 4-bit differential signal. Its sampling frequency is still 8 kHz and the data rate is 32 Kb/s, so that 2:1 data compression is obtained.
Coding process: Calculate the difference d between the current sample value Sc and the previous predicted sample value Sp of the 8-bit binary complement code, and the difference is quantized and encoded to output the 4-bit ADPCM code I. In the algorithm, a structure variable is defined to store the predicted sample value Sp and the quantization step q, and two tables are formulated: one table is the index adjustment table, whose input is the difference quantization code I, which is used to update the step index; the other table is the step adjustment table, whose input is the step index and the output is the step q. When encoding, first use the step index of the previous sampling point to look up the step adjustment table to find the step q, and then determine the 4-bit ADPCM encoding value I according to the following formula:
Then use the encoding value I as the input of the index adjustment table, look up the table output index adjustment, and add it to the original step index in the structure variable to generate a new step index, which is used in the encoding of the next sampling value. After the encoder outputs I, it is necessary to repeat the calculation process that is exactly the same as decoding to find a new predicted sampling value Sp.
Decoding process: First, use the step index to look up the step adjustment table to get the quantization step, and the difference quantization encoding I is inversely quantized to get the speech difference d, which is the inverse process of finding I; then reconstruct the current speech signal Sc together with the previous prediction value Sp; finally, use Sp=Sc to update the prediction value Sp, and use I to update the quantization step index.
After the design is completed, the ADPCM codec is simulated, and the simulation results are shown in Figure 6. AD_DataBus is the input signal before encoding, which is generated by Testbench. When the encoding enable signal P1_7 is "0", encoding starts. When P1_7 jumps to "1", encoding is blocked. At this time, the decoding enable signal P1_4 is "0", decoding starts. When P1_4 jumps to "1", decoding is blocked. It can be seen that the input signal AD_DataBus before encoding and the decoder output DA_DataBus basically meet the requirements. Since the ADPCM algorithm itself is lossy compression, it can be determined that the design of this part is correct and reliable.
4.2 Microcontroller part
The single-chip microcomputer is the control center of the whole system. It is responsible for detecting danger and judging its type to select and play the corresponding alarm information. Its working process is shown in Figure 7. This paper gives the use of 3 buttons to represent the occurrence of 3 kinds of dangers for the single-chip microcomputer to detect.
Select the commonly used 51 series single-chip microcomputer AT89C52, and use C51 language programming to complete the program design, and the experimental effect is ideal.
5 Conclusion
This system design is the use of single-chip microcomputer and FPGA in combination, giving full play to their respective advantages. It has achieved ideal results and is very practical. At the same time, it also proves the efficiency of using programmable logic devices to realize voice digital compression processing. Experiments have proved that this system can reproduce the recorded alarm voice well with high fidelity. The driver can change the alarm sound at will according to his own preferences. In critical situations, this system will automatically issue a clear alarm prompt, which greatly improves driving safety.
Reference address:Design of automobile intelligent voice alarm system based on ADPCM algorithm
In order to prevent traffic accidents, when the intelligent detection device of the car detects danger ahead, it must send a warning message to the driver. The voice alarm clearly reminds the driver of the danger so that the driver can take timely and accurate measures. Therefore, this paper proposes digital voice processing technology, which first collects and stores the alarm information of various conditions digitally. When encountering danger, it will judge the type of danger and automatically select the stored alarm information to play. Due to the large amount of voice information, direct storage requires a huge storage space. For this reason, this paper uses FPGA to implement the ADPCM (Adaptive Differential Pulse Code Modulation) codec design to compress and store the voice information. Thus, the amount of stored information is doubled.
2 System Structure and Principle
This system design is based on the single-chip microcomputer and FPGA. The single-chip microcomputer controls the working state of the system, starts recording and playback, and counts and displays the recording and playback time. The FPGA compresses, stores, and decompresses the collected data. The single-chip microcomputer and FPGA work in coordination to improve the working efficiency and stability of the system. The system structure is shown in Figure 1.
First, the various alarm sounds that are expected to be collected are converted into digital signals by the A/D converter through the forward channel (microphone, differential amplifier, filter, adder) and sent to the FPGA for ADPCM compression encoding processing, and then stored in the static memory SRAM. When encountering danger, the microcontroller judges the danger, controls the FPGA to take out the corresponding voice data from the SRAM and decode it, and then sends it to the 8-bit D/A converter to convert it into an analog signal, and then reproduces the alarm sound through the backward channel (filter, correction circuit, power amplifier, speaker).
3 Main hardware design of the system
3.1 Preamplifier The
electret microphone is used to collect the voice signal and convert its signal amplitude into an electrical signal of millivolt level. When the system front stage processes it, the signal-to-noise ratio at the input end of the amplifier should be increased as much as possible to ensure that the amplifier circuit has accurate and stable gain. To this end, this paper designs the detection amplifier circuit shown in Figure 2. The circuit uses a voltage follower in the front stage, which uses the characteristics of infinite input resistance and zero output to provide high input resistance and realize impedance transformation and isolation; the back stage uses a differential amplifier to obtain a higher common mode rejection ratio and enhance the circuit's anti-interference ability.
The voltage follower is composed of the excellent low-noise audio amplifier NE5532, with an operating voltage of 12 V and an operating bandwidth of 10 MHz, which is particularly suitable for voice information processing. The differential amplifier is implemented using AD620. AD620 is actually a differential amplifier inside, with small offset voltage and current and high common mode rejection ratio. Therefore, it has excellent performance in processing weak signals, that is, amplification and noise elimination. Its gain G=1+(49.4 kΩ/Rg) (Rg is the resistor connected between pins 1 and 8). Adjust the potentiometer R1 so that the amplitude of the amplified signal is between -2.5 V and 2.5 V, which is convenient for A/D converter sampling and quantization.
3.2 Bandpass filter
The voice signal is easy to pick up noise after amplification and transmission, so before data collection, it is necessary to filter out the out-of-band clutter through a bandpass filter. The human voice frequency range is 300 Hz to 3.4 kHz, so the passband range of the filter should be 300 Hz to 3.4kHz. Such a wide frequency band must be achieved by cascading the low-pass part and the high-pass part.
High-pass filter design indicators: passband cutoff frequency fp = 300Hz, passband maximum allowable attenuation αp ≤ 3 dB; to eliminate power frequency interference, the stopband cutoff frequency fs = 50 Hz is determined, and the stopband minimum allowable attenuation as>40 dB. Two-stage second-order Butterworth high-pass filters are selected to be cascaded. The simulation results are shown in Figure 3.
The design index of the low-pass filter is: passband cutoff frequency fp = 3 400 Hz, the maximum attenuation allowed in the passband αp ≤ 3 dB; to suppress sampling aliasing distortion, the stopband cutoff frequency fs = 4 000 Hz is determined, and the minimum attenuation allowed in the stopband as ≥ 40 dB. Since the elliptic filter can obtain a narrower transition bandwidth than other filters, it is suitable for this system design. The fifth-order elliptic low-pass filter circuit is obtained by using the filter auxiliary design software Filter Wiz Pro as shown in Figure 4, and the simulation results are shown in Figure 5. By
cascading high-pass and low-pass filters, a 300 Hz ~ 3.4 kHz bandpass filter can be obtained. Experiments show that the filter has a good effect and meets the design index. The design of the bandpass filter of the backward channel is the same. [page]
4 System software design
4.1 FPGA part
Altera's Cyclone series EPlC6Q-240C8 is selected to implement the ADPCM encoder and decoder. The device contains 120,000 typical gate resources, 5,980 logic units, 6 RAM modules, 92,160-bit RAM or ROM, 2 digital PLLs, 185 programmable I/O ports, and the highest working clock can reach more than 300 MHz. It can be configured in the system through the JTAG interface.
ADPCM is a waveform coding technology that uses the high correlation between samples and the quantization order to adaptively compress data. ADPCM combines the adaptive characteristics of APCM and the differential characteristics of DPCM. Its core idea is to use adaptive changes in the size of the quantization order, that is, to use a small quantization order to encode a small difference, and to use a large quantization order to encode a large difference; use the past sample value to estimate the predicted value of the next input sample, and the difference between the actual sample value and the predicted value is always the smallest. The input signal of ADPCM codec is G.711 PCM code. If the sampling frequency is 8 kHz and each code is 8 bits, its data rate is 64 Kb/s, and the output code of ADPCM is the output of "adaptive quantizer", which is a 4-bit differential signal. Its sampling frequency is still 8 kHz and the data rate is 32 Kb/s, so that 2:1 data compression is obtained.
Coding process: Calculate the difference d between the current sample value Sc and the previous predicted sample value Sp of the 8-bit binary complement code, and the difference is quantized and encoded to output the 4-bit ADPCM code I. In the algorithm, a structure variable is defined to store the predicted sample value Sp and the quantization step q, and two tables are formulated: one table is the index adjustment table, whose input is the difference quantization code I, which is used to update the step index; the other table is the step adjustment table, whose input is the step index and the output is the step q. When encoding, first use the step index of the previous sampling point to look up the step adjustment table to find the step q, and then determine the 4-bit ADPCM encoding value I according to the following formula:
Then use the encoding value I as the input of the index adjustment table, look up the table output index adjustment, and add it to the original step index in the structure variable to generate a new step index, which is used in the encoding of the next sampling value. After the encoder outputs I, it is necessary to repeat the calculation process that is exactly the same as decoding to find a new predicted sampling value Sp.
Decoding process: First, use the step index to look up the step adjustment table to get the quantization step, and the difference quantization encoding I is inversely quantized to get the speech difference d, which is the inverse process of finding I; then reconstruct the current speech signal Sc together with the previous prediction value Sp; finally, use Sp=Sc to update the prediction value Sp, and use I to update the quantization step index.
After the design is completed, the ADPCM codec is simulated, and the simulation results are shown in Figure 6. AD_DataBus is the input signal before encoding, which is generated by Testbench. When the encoding enable signal P1_7 is "0", encoding starts. When P1_7 jumps to "1", encoding is blocked. At this time, the decoding enable signal P1_4 is "0", decoding starts. When P1_4 jumps to "1", decoding is blocked. It can be seen that the input signal AD_DataBus before encoding and the decoder output DA_DataBus basically meet the requirements. Since the ADPCM algorithm itself is lossy compression, it can be determined that the design of this part is correct and reliable.
4.2 Microcontroller part
The single-chip microcomputer is the control center of the whole system. It is responsible for detecting danger and judging its type to select and play the corresponding alarm information. Its working process is shown in Figure 7. This paper gives the use of 3 buttons to represent the occurrence of 3 kinds of dangers for the single-chip microcomputer to detect.
Select the commonly used 51 series single-chip microcomputer AT89C52, and use C51 language programming to complete the program design, and the experimental effect is ideal.
5 Conclusion
This system design is the use of single-chip microcomputer and FPGA in combination, giving full play to their respective advantages. It has achieved ideal results and is very practical. At the same time, it also proves the efficiency of using programmable logic devices to realize voice digital compression processing. Experiments have proved that this system can reproduce the recorded alarm voice well with high fidelity. The driver can change the alarm sound at will according to his own preferences. In critical situations, this system will automatically issue a clear alarm prompt, which greatly improves driving safety.
Previous article:Design of a multifunctional engine speed simulator
Next article:Design of dynamic system for vehicle simulation driving training system
- Popular Resources
- Popular amplifiers
- AB PLC例程 [MMS_050494]Propagating SOE Time Stamp Data to an FTViewSE Alarm Banner in a Standard CLX R
- Training embedded apps to process speech may be as easy as finding the right 8-bit micro. Don’t let
- Design of Temperature Monitoring System Based on AT89C2051
- Design of intelligent voice system based on ISD2500 and ATmega8
Recommended Content
Latest Microcontroller Articles
He Limin Column
Microcontroller and Embedded Systems Bible
Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
MoreSelected Circuit Diagrams
MorePopular Articles
- Innolux's intelligent steer-by-wire solution makes cars smarter and safer
- 8051 MCU - Parity Check
- How to efficiently balance the sensitivity of tactile sensing interfaces
- What should I do if the servo motor shakes? What causes the servo motor to shake quickly?
- 【Brushless Motor】Analysis of three-phase BLDC motor and sharing of two popular development boards
- Midea Industrial Technology's subsidiaries Clou Electronics and Hekang New Energy jointly appeared at the Munich Battery Energy Storage Exhibition and Solar Energy Exhibition
- Guoxin Sichen | Application of ferroelectric memory PB85RS2MC in power battery management, with a capacity of 2M
- Analysis of common faults of frequency converter
- In a head-on competition with Qualcomm, what kind of cockpit products has Intel come up with?
- Dalian Rongke's all-vanadium liquid flow battery energy storage equipment industrialization project has entered the sprint stage before production
MoreDaily News
- Allegro MicroSystems Introduces Advanced Magnetic and Inductive Position Sensing Solutions at Electronica 2024
- Car key in the left hand, liveness detection radar in the right hand, UWB is imperative for cars!
- After a decade of rapid development, domestic CIS has entered the market
- Aegis Dagger Battery + Thor EM-i Super Hybrid, Geely New Energy has thrown out two "king bombs"
- A brief discussion on functional safety - fault, error, and failure
- In the smart car 2.0 cycle, these core industry chains are facing major opportunities!
- The United States and Japan are developing new batteries. CATL faces challenges? How should China's new energy battery industry respond?
- Murata launches high-precision 6-axis inertial sensor for automobiles
- Ford patents pre-charge alarm to help save costs and respond to emergencies
- New real-time microcontroller system from Texas Instruments enables smarter processing in automotive and industrial applications
Guess you like