Parallel Hydraulic Hybrid Electric Vehicle Control System Based on Single Chip Microcomputer

Publisher:廿由人Latest update time:2015-03-11 Source: dzsc Reading articles on mobile phones Scan QR code
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    At present, my country's urban public transportation mainly relies on buses, and the distance between stations is generally 500 to 1,000 meters. Buses brake and start several times between each stop. During peak traffic hours, braking and starting are more frequent, which leads to a series of problems such as energy waste, increased exhaust pollution, and shortened component life.

    The control system studied in this project can make full use of the braking energy of the parallel hydraulic hybrid vehicle. In road conditions with frequent braking and starting, it can significantly improve the vehicle's starting, acceleration and deceleration characteristics, improve vehicle emissions, reduce fuel consumption, and extend the life of the engine and brake device. Moreover, compared with hybrid electric vehicles, this system has considerable advantages in terms of cost, technical maturity, reliability, and maintainability.

    The power transmission system of the parallel hydraulic hybrid vehicle has two or more power sources that can provide power simultaneously or individually, and two or more corresponding actuators that can drive the load simultaneously. The power transmission system is mainly composed of an engine, a gearbox, a main reducer, a hydraulic accumulator and a hydraulic pump/motor. The parallel form retains the power transmission chain of the traditional vehicle, but adds an energy regeneration system consisting of a hydraulic pump/motor and a hydraulic accumulator to the original transmission chain, thereby forming a dual-power drive.

    At present, the parallel hydraulic hybrid vehicle technology is relatively mature, as shown in Figure 1.

    When the vehicle starts and accelerates, the hydraulic drive system provides auxiliary power and releases the energy stored in the accumulator; when the vehicle decelerates and brakes, the hydraulic drive system provides auxiliary braking force and stores energy in the accumulator.

    Figure 1 Schematic diagram of the structure of a parallel hydraulic hybrid vehicle

    2 Control system network structure

    CAN bus is a serial communication network that effectively supports distributed control or real-time control. Its superiority is obvious. At the same time, CAN bus is also considered to be the best communication structure for hybrid vehicles. This article uses CAN bus network to build a control system.

    As shown in Figure 2 below, the control system adopts distributed control, with a total of 5 node controllers, which are mainly distributed in places on the vehicle where the control and collection quantities are dense, including the main control module, hydraulic system measurement and control module, hydraulic filling control module, vehicle information collection module and engine control module.

    Figure 2 Control system network structure

    The main control module controller uses a PC104 computer equipped with an intelligent PC104  CAN control card, and other module controllers use a P80C592 single-chip microcomputer as the core. The P80C592 chip itself integrates a CAN controller, an A/D converter, and a watchdog. The use of this chip makes it possible to miniaturize each control node, and on its basis, expands the input and output of peripheral analog and digital quantities, which is convenient for process control.

    3 Communication management of control system

    3.1 CAN bus node address allocation

    For the CAN bus network based on the hardware of the P80C592 and PC104 CAN communication cards, there are two types of information frames used for communication messages between nodes: data frames and remote frames. After the frame start bit of the data frame and the remote frame, there is an arbitration field consisting of an identifier and a remote transmission request bit (RTR). The length of the identifier is 11 (ID.10 to ID.0) bits, which contains the target address characteristics of the information frame. The RTR bit must be a "dominant" level in the data frame to mark the frame type.

The receiving filter     of the node message receiver consists of two parts: the receiving code register (ACR) and the receiving mask register (AMR). Both registers are 8 bits: the acceptance code bit (AC.7~AC.0) and the acceptance mask bit (AM.7~AM.0). When the highest 8 bits (ID.10~ID.3) of the message identifier of the information frame satisfy the following equation:

    [(ID.10~ID.3)=(AC.7~AC.0)] or (AM.7~AM.0)=11111111B

    Then the information frame will be received by the message receiver.

    For the five network nodes of this system, the acceptance code and acceptance mask code of each node are defined as follows:

    1#: ACR=81H, AMR=BEH;

    2#: ACR=82H, AMR=BDH;

    3#: ACR=84H, AMR=BBH;

    4#: ACR=88H, AMR=B7H;

    Host: ACR=A0H, AMR=9FH;

    According to the above node address allocation, each node can send information to any other node combination. For example, if the host sends information to nodes 1#, 2#, and 3# at the same time, the high 8 bits of the identifier of the information frame sent by the host can be written as: 87H or 07H.

    It can be seen that for the message receiver, ID.10 = 0 or 1 makes no difference. However, according to the CAN bus protocol, the dominant bit "0" will have a higher bus priority than the recessive bit "1". Define the information frame with ID.10 = 0 as a "fast frame" and the information frame with ID.10 = 1 as a "normal frame". [page]

    Therefore, the above address allocation method has the following advantages:

    (1) It is easy to send information from a single point to any combination of other points;

    (2) Each node has a different priority, from 1# to 5# and then to the host, which reduces the priority in turn, to ensure that the signal sent to the key node is not blocked;

    (3) Each node has two address codes with different priorities to ensure that critical instructions are received first.

    3.2 Communication methods and information frame classification

    Due to the large amount of distributed control communication, classifying the information and specifying the corresponding protocol will be conducive to software standardization, improving programming efficiency and program reliability. First, according to the CAN bus protocol standard, the CAN information frame format described in C language is defined:

    struct CAN_MSG

    {

    unsigned  char  CAN_FLAG;

    unsigned char CAN_DLC;

    unsigned char CAN_DATA[8];

    };

    Among them, CAN_FLAG is the information target identifier, CAN_DLC contains the remote frame signal bit, frame definition description and data frame length information, and CAN_DATA is 8 bytes of data.

    According to the flow direction, bus priority and function of information, communication information is divided into 5 categories, which are defined as follows (arranged from low to high priority):

    (1) Remote frame: sent by the host to each controller at a certain beat, triggering the corresponding controller to send the status frame. The purpose is to enable the host to obtain the status information of the electric vehicle within a specified time, while reducing the bus congestion caused by the automatic sending of status frames by each controller.

    Format: CAN_FLAG uses "normal frame" point-to-point encoding; CAN_DLC=0xF0; CAN_DATA is empty.

    (2) Status frame: sent by the controller to the host or other controllers. The status frame returns the current command execution status and collection volume information, which serves as a sign for the upper-level controller to execute the next step of planning.

    Format: CAN_FLAG uses "normal frame" point-to-point and point-to-multi-code; CAN_DLC = 0xE8; CAN_DATA[0] is the status or information data identifier to determine the meaning of subsequent data; CAN_DATA[1]~ CAN_DATA[7] are data.

    (3) Indirect command frame: sent from the host to the controller, or from a controller running a compound action element to other controllers. The indirect command frame contains compound action elements or action element instructions. The receiver must decompose the command to generate the control element instructions that drive the peripheral action.

    Format: CAN_FLAG uses "normal frame" point-to-point and point-to-multipoint encoding; CAN_DLC = 0x60 + DLC, DLC is equal to the number of bytes of valid data; CAN_DATA [0] is the status or information data identifier, which determines the meaning of subsequent data; CAN_DATA contains specific instruction information.

    (4) Direct command frame: The sending direction is the same as the indirect command frame. However, the command contained in this command frame will be directly executed by the receiver to drive the control element action. Therefore, it should have a higher priority than the indirect command frame.

    Format: CAN_FLAG uses "fast frame" point-to-point and point-to-multi encoding; CAN_DLC=0x20+DLC, DLC is equal to the number of bytes of valid data; CAN_DATA contains specific instruction information.

    (5) Emergency command frame: sent from the controller that detects the emergency to other related controllers. This command has the highest priority and is used to quickly execute corresponding actions to avoid accidents when an emergency is detected. The command will be executed directly by the recipient.

    Format: CAN_FLAG uses "fast frame" point-to-point and point-to-multi encoding; CAN_DLC=0x00+DLC, DLC is equal to the number of bytes of valid data; CAN_DATA contains specific instruction information.

    3.3 Software Design

    CAN bus provides a good hardware foundation for distributed control, so that the communication of each node is no longer the main factor restricting the realization of distributed control. In essence, the entire system no longer has the distinction between master and slave nodes. The control of the entire system has been transformed from the single control of the master node in the traditional network (this system architecture requires the host computer to have a large-capacity program memory and high computing speed, which will inevitably cause the host computer to be large-scale) to the coordinated control of each node, which increases the flexibility of system control and reduces the requirements for the master node.

    Figure 3 Input and output parameters of controllers 1# and 3#

    As shown in Figure 3 above, the vehicle information acquisition module collects vehicle speed, engine speed, gear position signal (forward, neutral, reverse), and the status and amplitude of the accelerator and brake pedals. The hydraulic system measurement and control module collects the pressure of the accumulator, controls the clutch engagement and disengagement, realizes the oil distribution control through oil circuit control (4 switch quantities), and finally realizes the recovery/release function and strength of the hydraulic system through hydraulic pump/motor control.

    Each node controller can independently complete the functions of partial command decomposition and calling the underlying command. In this way, for a certain action element, the node controller will act as the "command host". The following takes the flow chart of 1# and 3# controllers (as shown in Figure 4 and Figure 5) when the composite action element "hydraulic system operation adjustment" is executed as an example to illustrate the role of each controller in the distributed control system. It can be seen that during the execution of this command, the 3# controller acts as the "command host" of the 1# controller. [page]

    The use of distributed control can free the host from the cumbersome logic control process, which plays an important role in the miniaturization and productization of the host.

    Figure 5 3# controller software flow

    4 System reliability design

    There is a lot of work to do in hardware reliability, mainly in the following two aspects:

    (1) Dual-time watchdog: Each node controller of the system adopts a dual-time watchdog circuit. The dual-time watchdog has two timers: one is a short timer (built-in single-chip microcomputer P80C592), and the other is a long timer (external watchdog timer MAX705 ). The short timer is set to T1, and the long timer is set to T2.

    In this way, when the program enters an infinite loop, if the infinite loop contains a short timer FeedDog statement but not a long timer FeedDog statement, the long timer will eventually overflow and reset the microcontroller. By cleverly arranging the position of the long timer FeedDog statement, the probability of a crash can be extremely low.

    (2) Anti-interference of CAN bus system: In order to enhance the anti-interference ability of CAN bus nodes, CTX0 and CRX0 of P80C592 are not directly connected to TXD and RXD of 82C250  , but are designed to be connected to 82C250 through high-speed optical coupler 6N137. In this way, the electrical isolation between CAN nodes on the bus is well achieved. One point that should be specially pointed out is that the two power supplies used in the optical coupler circuit are completely isolated, otherwise the use of optical couplers will lose its meaning. The complete isolation of the power supply uses two low-power DC/DC power isolation modules. Although the implementation of these parts increases the complexity and cost of the node, it improves the stability and safety of the node.

    The interface between 82C250 and CAN bus also adopts certain safety and anti-interference measures. The CANH and CANL pins of 82C250 are connected to the CAN bus through a 5Ω resistor respectively . The resistor can play a certain current limiting role to protect 82C250 from overcurrent impact. Two 30P small capacitors are connected in parallel between CANH and CANL and the ground , which can filter out high-frequency interference on the bus and have a certain ability to prevent electromagnetic radiation.

    In addition, each node controller is also equipped with a power indicator light and a bus data receiving and sending indicator light, which can let users understand the status of the controller to a certain extent.

    In the software reliability design, a timer is set for each program branch that needs to wait in each node controller program. If the operating conditions are still not met within the specified time, the controller will cancel the current task and alarm the host.

    5 Conclusion

    The innovation of this paper lies in the design of a hydraulic hybrid vehicle control system using a CAN bus network structure, the construction of a distributed electric vehicle control system hardware platform based on the CAN bus, the determination of the system's network protocol, and the design of control software based on the proposed distributed structure. Finally, the system's hardware and software reliability is designed.

    The series hybrid electric vehicle control system designed in this paper has been tested on the test bench and various functional tests have been completed. The test shows that the control system has stable performance, reliable operation, fast response to emergency commands, and can save historical data, which can well meet the operation requirements of hydraulic hybrid vehicles.

Reference address:Parallel Hydraulic Hybrid Electric Vehicle Control System Based on Single Chip Microcomputer

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