1 System hardware circuit design
The microprocessor is the core of the HART intelligent transmitter, coordinating the correct and orderly operation of each module. At present, the 51 series of single-chip microcomputers are widely used in the market, but most of them still use 8-bit central processing units. For hardware systems with high requirements for computing speed, such as HART communication, 8-bit processors can no longer meet the requirements. In addition, the hardware resources inside the 51 single-chip microcomputer are relatively small. The single-chip microcomputer needs to communicate with peripheral circuits such as LCD display module, A/D conversion module, D/A conversion module, UART communication module, etc., and the peripheral expansion ports of the 51 single-chip microcomputer are limited, which obviously does not meet the requirements. The MCU in this hardware system adopts the MC9S12E64[3] produced by Motorola. Compared with ordinary microprocessor chips, this chip has more advantages. MC9S12E64 adopts modular structure and 16-bit central processing unit CPU, with a maximum bus speed of 8 MHz, which greatly improves the computing speed and accuracy.
1.1 System design
In order to meet the requirements of multi-channel data measurement and low power consumption, the hardware circuit mainly includes: MCU microprocessor module; A/D conversion module; HART communication module; power supply module; constant voltage/constant current excitation circuit.
In order to realize the measurement of multi-channel analog signals, this hardware system adopts 24-bit multi-channel ADC (AD7714), two of which constitute differential voltage V1 input, and the other two respectively measure single-ended voltage V2 and current I. As shown in Figure 1, a resistor is added to the input end of the current, and the measurement of the current is actually the measurement of the voltage. In this way, the corresponding voltage value is converted to the actual current value. In order to overcome the influence of the input voltage and current signal on the measurement of AD7714, the digital switch chip ADG733 is used in the hardware circuit design. ADG733 is controlled by MCU to indirectly "open" or "close" the input channel, eliminate the interference of external signals on AD conversion, and facilitate the measurement of multiple channels. Adding a driving circuit composed of an op amp in front of each channel can form an analog filtering and amplification network to improve the measurement accuracy. The UART input signal is directly connected to the idle pin of the MCU to realize digital measurement. Considering the power consumption, it is impossible to use all measurement channels in actual use. 1~2 channels will be configured for measurement and conversion as needed.
1.2 Hierarchical power supply network and low power design
1.2.1 Hierarchical power supply network design
considerations Under the condition of single power supply (as shown in Figure 2), since the MCU, D/A, HART and other modules need to use nearly 2 mA of current, the power of the signal sampling part is very limited, only about 1 mA. Excluding the current consumed by A/D, op amp, etc., the actual current provided to the sensor is only about 0.5 mA. The power consumption can only be reduced by reducing the magnitude of the excitation voltage/current. At the same time, it is controlled in the software, and only one measurement channel can be sampled and converted and output at a time. The advantage of this solution is that the structure is simple, but the use is limited. Only digital communication can achieve the measurement of multiple parameters. Another solution is to use a hierarchical power supply network mode. The measurement and conversion of analog signals use the upper 3 V power supply network (adjusted by TL431, which can provide about 2 mA of current). At the same time, this stable 3 V can be used directly as a constant voltage source for sensor excitation. The measurement of digital signals (frequency and UART) uses the lower power supply network to achieve a simple connection with the MCU. The advantage of this solution is that it solves the power consumption problem, but the circuit becomes complicated, and the analog signal and the digital signal do not share the same "ground" on the input interface side, so they should be separated. Figure 3 shows the design of the hierarchical power supply network. [page] 1.2.2 Design of the level conversion module The upper circuit, such as AD7714, uses a power supply of VDD=+6 V and GND=+3 V. For AD714, +3 V represents 0 and +6 V represents 1. The MCU uses a lower power supply, that is, VDD=3 V, GND=0 V. For the MCU, 0 V represents 0 and +3 V represents 1. If the AD7714 is to communicate with the MCU via SPI, it is obviously not possible to simply connect the two ports. A suitable level conversion circuit needs to be designed to meet the requirements of digital communication. In Figure 4, the 0 V~3 V voltage of the MOSI of the MCU is converted into a 3 V~6 V voltage for the AD7714 to perform SPI digital communication. When the MCU output is 0, that is, the input is 0 V, the transistor Vbe = 0 V < 0.7 V, the transistor is cut off, the voltage input to the inverter is +6 V, and the inverter output is 3 V; if the MOSI input is +3 V, the transistor is turned on, and the voltage input to the inverter is 3 V after the voltage is divided by two resistors from +6 V, then the inverter output is +6 V, thus achieving the level conversion. Similarly, the level conversion from 3 V~6 V to 0 V~3 V is shown in Figure 5. When the input is +6 V, the transistor is cut off, the voltage input to the inverter is 0 V, and the output is +3 V. When the input voltage is 3 V, the transistor is turned on, and the voltage input to the inverter after the voltage is divided is +3 V, and the output is 0 V. 1.3 Design of HART communication module The HART protocol communication module is mainly composed of A5191HRT and AD421 DAC in the field instrument. Among them, AD421 receives the digital signal transmitted by MCU and converts it into 4 mA~20 mA current output, and transmits the measurement results: A5191HART[1] receives the FSK signal superimposed on the 4 mA-20 mA loop. After demodulation, it is transmitted to MCU, or the response frame information generated by MCU is modulated into FSK signal and then superimposed on the 4 mA~20 mA loop by AD421 for transmission, as shown in Figure 6. A5191HRT includes a transmitting data modulator and waveform shaping circuit, a carrier detection circuit, a receiving filter and demodulation circuit, a control logic and a clock oscillator circuit. The modulator receives the non-return-to-zero code and modulates it into an FSK signal. 1200 Hz represents logic "1", 2200 Hz represents logic "0", and the data rate is 1200 b/s. After that, the waveform shaping circuit shapes the FSK signal into a signal compatible with the HART protocol requirements and sends it out. 2 System software design The software of the HART universal intelligent transmitter is divided into four parts according to its function: monitoring program, measurement and control program, HART communication program and auxiliary program. The monitoring program is the central link of the entire system software, also known as the main program. It receives and analyzes various commands, manages and coordinates the execution of all programs, including system initialization, system self-test and other parts; the measurement and control program mainly includes data acquisition, data processing, output control and self-diagnosis. Among them, data acquisition is realized through the sampling interrupt subroutine, and data processing, output control and self-diagnosis are called in the main program. The HART communication program is the software implementation of the HART protocol data link layer and application layer. It is the key to the software design of the entire intelligent transmitter, and the interoperability of the instrument is also reflected here. The data link layer software is mainly the serial port receive/send interrupt subroutine, which belongs to the interrupt processing (service) program; the application layer software translates and processes the received command frame and is called in the main program. 2.1 Design of HART communication program The HART communication program is the software implementation of the HART protocol data link layer and application layer. The serial port interrupt is used to realize the receiving and sending services of communication. The communication work that complies with the HART protocol is completed in this program, as shown in Figure 7. After entering the serial port interrupt service program, it is necessary to first determine whether it is a send request or a receive request. If the send request flag is 1, it will turn to the send service program. If the receive request flag is 1, it will turn to the receive service program. The software of the HART application layer translates and processes the received command frame, such as: conversion between byte streams and floating point numbers, integers, and strings, and then performs corresponding command processing according to their respective command numbers, such as: changing the range, changing the unit, changing the damping time, etc. Finally, the response frame is placed in the send buffer in a certain format and sent back by the serial port interrupt. If there is a communication error or command error, a response frame reporting the error is sent back. The send service program sends information to the upper computer during the program running process. To set the send request flag, store the data information to be sent in the serial port send buffer, and calculate the vertical checksum. The format of the data information to be sent here is: preamble 2 B, delimiter 1 B, address code 1 or 5 B, command number 1 B, byte length 1 B, response code 2 bytes, data 0~25 B, checksum 1 B. When sending, first start the carrier transmission, initialize the physical layer, establish a communication link and communicate with another peer communication entity, send a response frame, stop sending the carrier after the transmission is completed, initialize the physical layer, and terminate the physical layer link communication. The sending service first sends the preamble, and the counter is reduced by 1 for each preamble sent, and then sends the response frame of the HART protocol, and stops sending the carrier after the transmission is completed. At present, the market share of HART-type smart instruments has reached nearly 50%, but about 40% of the instruments still use analog or non-standard digital protocols for output. These instruments will gradually be replaced by HART protocols or other digital bus protocols. In order to upgrade these special specification products to HART-type smart instruments, it is generally necessary to customize the matching electronic components or HART conversion modules. These composite multi-parameter sensors are also composed of ordinary pressure, differential pressure, temperature and other sensors. In order to realize the upgrade of these special specification instruments or sensors to HART-type smart transmitters, it is necessary to design universal electronic components and provide multiple measurement channels, which can not only match the common sensors on the market, but also match the composite multi-parameter sensors. This paper is based on the current industrial reality requirements, designing a multi-channel data measurement intelligent transmitter based on HART protocol to meet multi-parameter measurement. In circuit design, in order to reduce the power consumption of hardware circuits, a double-layer power supply network structure is proposed to meet the circuit design requirements.
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Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
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