MSP430 low power event driven working mode

MSP430 low power event driven working mode

Each module of the MSP430 series microcontroller can run independently, such as timer, input/output port, A/D conversion, watchdog, LCD display, etc. can work independently when the CPU is in sleep state. If the main CPU needs to work, any module can wake up the CPU through an interrupt, so that the system can run with the lowest power consumption.

Allowing the CPU to work in a burst state can fully utilize the low power consumption of the CPU. Usually, the CPU is set to a low power mode using software, and an interrupt is used to wake up the CPU from the sleep state when needed. After completing the work, it can enter the corresponding sleep state again. For example, let the CPU work in the LPM3 state, and switch to the AM active mode through an interrupt event. According to the operation needs, it can enter the corresponding low power mode from the AM state: LPM0/LPM3 or LPM4.

These low power consumption characteristics of the system are achieved by the system's response to interrupts. The process of the system responding to interrupts: (1) Hardware automatic interrupt service. Including PC stacking, SR stacking; interrupt vector assigned to PC; GIE, CPUOFF, OSCOFF and SCG1 cleared; and IFG flag cleared (single source interrupt flag). (2) Execute the interrupt handling subroutine. (3) Execute the RETI instruction (interrupt return), including SR stacking and PC stacking.

For example: after the system is initialized, it works in low power mode 0, an interrupt event triggers the active mode, and after the interrupt processing is completed, it enters low power mode 3.

;Main program

......; Initialization operation starts

……;

......; Initialization completed

BIS #GIE+CPUOFF, SR ; Set low power mode 0, LPM0 in the main program

;……;The program stops here

;Interrupt subroutine

…

……; Interrupt processing ends

BIS #GIE+CPUOFF+SCG1+SCG0, 0(SP) ; Set SR to low power mode 3, LPM3

RETI; interrupt return

;The system enters low power mode 3

…

If the main program expects to continue to perform certain operations after the interrupt returns, the SR value can be changed to AM mode in the interrupt handling subroutine. After the system interrupt exits, certain set operations can be performed according to the restored SR and PC values.

;Main program

......; Initialization operation starts

……;

......; Initialization completed

BIS #GIE+CPUOFF, SR ; Set low power mode 0, LPM0 in the main program

L1 Operation 1

L2 Operation 2

……;

;Interrupt subroutine

...; Interrupt processing starts

…

……; Interrupt processing ends

BIS #GIE+CPUOFF, 0(SP) ; Set SR to active mode, AM

RETI; interrupt return, the system enters active mode

…

The main program stops executing at LPM0, and L1, L2 and other statements are not executed. After that, the interrupt event saves PC (L1 instruction address) and SR (low power mode 0), the interrupt wakes up the CPU, and executes the interrupt handler; because SR is set to active mode in the interrupt handler, the CPU is in active state after the interrupt returns, and continues to execute from the L1 instruction pointed to by PC...