0 Introduction
The navigation computer is a component of the strapdown combined navigation assembly, which can receive data from multiple input data interfaces and output the results through the output data interface. In order to verify the functions and performance indicators of the navigation computer, the test instrument can be used to complete the detection and testing of the navigation computer. The overall development goal of the navigation computer test instrument is to be able to conveniently and quickly test the two sets of navigation computers, including the rate test of multiple interfaces of the navigation computer, the correctness and integrity test of interface transmission data, and the test of the navigation computer data processing DSP.
1 System composition
This navigation computer test instrument is mainly composed of two parts: test module and display control module. The test module mainly includes test interface and test unit; the display control module is the input and output device of the navigation computer test instrument, mainly including host computer processing unit and display unit. Its specific composition is shown in Figure 1.
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2 Test module
The test module is mainly used to test the working status and performance of the navigation computer, including the test of each interface of the navigation computer and the test of the DSP processing performance. The test module mainly
includes the test interface and the test unit. In order to meet the requirements of testing two sets of navigation computers at the same time and to facilitate the upgrade, this design considers a one-to-one test mode. Figure 2 shows the block diagram of the test module for a set of navigation computers. In order
to meet the requirements that all interfaces of the two sets of navigation computers can work at the required rate at the same time, two processors can be selected to implement one-to-one testing to ensure its real-time performance. The processor of the test part can use Atmel's AT91RM9200 as the central control part of the test instrument, and its two processors have the same functions. Taking one of them as an example, its main functions include:
(1) sending data at the required rate, interrupting the reception of data from two RS232, nine RS422A, and one RS429 (1 receive, 2 transmit) data communication interfaces, unloading frames, testing the data transmission interface
rate, data correctness, and data integrity;
(2) the test results should be connected to the display part through the RS232 interface and displayed in real time;
(3) expanding the input and output interface through programmable logic devices;
(4) controlling the data interaction with the display part;
(5) controlling the data interaction between the program and the data storage.
This paper selects Ahera's CycloneII series chip EP2C80208C6 to complete the expansion of the RS422 interface and RS429 interface. The EP2C8Q208C6 device is a high-density, high-performance EEPROM device based on ATERA's second-generation MAX architecture, with an operating clock frequency of up to 260 MHz.
The main functions of EP2C8Q208C6 are to achieve system reset and clock distribution, data bus expansion, and external interface expansion.
3 Display Module
The display control module is the input and output device of the navigation computer tester. It is responsible for the function parameter input, setting and system control during the navigation computer test process. The hardware composition of the display control module is shown in Figure 3.
The core of the display control module is the ARM processor, which mainly completes LCD display, touch screen control, communication control of the test module, etc. The ARM processor can choose the embedded ARM processor S3C2440 of SAMSUNG, and the LCD can use a 7-9 inch touch screen LCD display, and use two RS232 serial ports as data transmission interfaces with test module 1 and test module 2. The upper processing unit controls the test module through these two serial ports.
The main function of the display part is to realize human-computer interaction, specifically to control the software operation of the test part, to interact with the test part, and to display the test results. Other external interfaces of the display part can enrich the functions of the tester. Among them, the result display part can be used to display the test results in real time, and the interface design needs to facilitate human-computer interaction: the control part mainly includes power supply control, reset control, test equipment selection control, etc.; the function selection includes data interface rate test, data transmission correctness test, data transmission integrity test and solution platform correctness test, etc.
4 Test objectives and test principles
According to the development objectives, the main test items implemented by this navigation tester are: 1. Testing the transmission rate of each interface; 2. Realizing data interaction with the navigation board according to the required rate and baud rate of each interface of the navigation computer in the development indicators, and the tester monitors the status of each interface in real time; 3. Testing the correctness and integrity of data transmitted by each interface; 4. Within a certain period of time (assuming 2 seconds). Use a certain algorithm to verify whether the data received by each interface during this period is complete. This function can be designed in the software as follows: within t seconds, sum the data received by each interface, and the sum of the data received by the jth channel within t seconds is:
where represents the i-th data received by the jth channel; j represents the serial number of each interface of the navigation board; M is the number of data sent by the channel each time. N is the number of times the interface receives data within t seconds, and vj represents the receiving rate of the interface;
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Finally, the DSP working status is tested. In general, after the navigation board is powered on, the DSP program that has been burned in it will first run a self-test (the LED light flashes to indicate normal operation), and then the DSP internal operation program will be simulated using the DSP simulator. The experimental algorithm is as follows:within a certain time t (assuming t=1 second), the sum of the data received by each interface Sj is sent to the DSP for simple calculations, where:
In the formula, represents the i-th data received by the j-th channel; j represents the serial number of each interface of the navigation board; M is the number of data sent by the channel each time. Nj is the number of times the interface receives data within t seconds, and vj represents the receiving rate of the interface.
The DSP performs a 2-times multiplication operation on the received Sj and obtains it, and then sends the result back to the tester.
5 Workflow
The test module is the central module of the navigation computer tester, responsible for testing the navigation computer and transmitting the test results to the host computer for display according to the protocol requirements. Figure 4 shows the workflow of the test module.
6 Conclusion
This paper introduces a design of a navigation computer tester based on AT91RM9200. The tester can receive data from multiple input data interfaces, and after the computer performs calculations, the results are output by the output data interface. This method can conveniently and quickly test two sets of navigation computers. At present, this system has been successfully applied in practice, proving that the system functions can fully meet actual needs.
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Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
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