SPI Bus-Based 51 Single-Chip Microcomputer Multi-machine Interconnection Programming Technology

Introduction
The resources of the 51 series microcontrollers are limited. When developers face more complex control tasks, the 51 microcontrollers are unable to cope with them. In this case, users can choose more advanced microcontroller models, such as ARM series 32-bit microcontrollers, to complete the target control task. Another option is to use the 51 microcontroller multi-machine system solution and use the decentralized control method to achieve the final complex target control task.
In the process of implementing a multi-machine system, the first thing to solve is the communication connection problem between multiple machines to ensure efficient and reliable data transmission between microcontrollers. The communication function between MCUs is the basis for the implementation of a multi-machine system and the key to the reliable operation of a multi-machine system.

1 Characteristics of the SPI interface
The SPI interface can provide a maximum serial data transmission capacity of 1 Mb. In theory, the communication rate is much higher than that of the traditional serial communication interface RS232, so it is very suitable for data exchange between CPUs in a multi-CPU system. In most cases, it can meet the communication needs.
Unlike RS232, SPI uses a shift register to implement serial communication. The SPI working method is shown in Figure 1.

In Figure 1, MOSI (Master Out and Slaver In) and MISO (Master In and Slaver Out) are the communication pins of the SPI interface. From the pin definition, it can be seen that whether it is data transmission or data reception, the SPI communication process should always be controlled by the host Master. The physical connection between the master and slave is a direct connection between the same-named ends.
Its working process is: after the host completes the data write operation on the SPI interface, the SPI starts data transmission, and the data is shifted and output from the host's MOSI pin and shifted to the slave; after a byte is transmitted, the SPI interface transmission flag is set for software developers to test control programming. Since each bit of data transmission only requires one machine cycle at the fastest, its communication rate is very fast.
This communication mode determines that SPI can only achieve short-range communication, usually the communication distance is tens of centimeters, not more than 1 m, and the communication parties of SPI have relatively weak control capabilities over the communication process. In order to ensure communication reliability during system design, a fixed master-slave and continuous transceiver working mode must be adopted.
The UART mode has a stronger control capability over the communication process, and can be a mutual master-slave and random transceiver working mode. Due to this difference, the communication programming of SPI is essentially different from the traditional RS232. In programming, it should be clearly defined who is the host and who is the slave in the system, and it should not be changed during the operation of the system. In addition, all communication processes are initiated by the host. Otherwise, it is difficult to ensure the reliability of communication.

2 Design and implementation of basic protocol
The microcontroller used is NXP's P89V51RD2, which has a large-capacity memory (64 KB Flash, 1 KB RAM) integrated inside. In addition, it also integrates 3 timer counters, UART, PCA, WDT and other rich interfaces. It is a cost-effective 51 microcontroller that provides physical support for complex target control.
It also integrates the SPI communication interface. Since the SPI only needs one machine cycle for each bit of data transmission, if the microcontroller system uses a 12 MHz crystal oscillator, it takes only 1μs to transmit 1 bit of data. If the UART interface that supports the RS232 standard is used, if the communication is at a maximum baud rate of 9,600 bps, it takes 104μs to transmit 1 bit of data. SPI's fast data transmission capability provides support for users to compile complex communication protocols.
Although SPI communication has a high transmission rate, it cannot meet the communication requirements of most users due to its fixed host and slave roles and continuous transmission characteristics. For example, SPI communication can only be initiated unidirectionally by the host, so how can users achieve bidirectional data transmission between the master and the slave? For another example, the SPI communication process is continuous, so how can the two communicating parties achieve random data transmission and reception? The SPI interface only provides a basic communication mechanism that users cannot use directly. If users want to use the SPI interface to achieve random bidirectional data exchange between two machines, they must compile a communication protocol. The electrical connection diagram of the SPI dual machine is shown in Figure 2.

In summary, the purpose of constructing the SPI basic communication protocol is to meet the requirements of bidirectional data transmission and random data transmission and reception between the two communicating parties.
In Figure 2, the basic protocol designed by the author is as follows: The working mode of SPI is that the host uses the PCA timer to continuously send and receive data, and the slave uses the serial interrupt to continuously send and receive data. Create a send and receive data packet, each data packet is 8 bytes, and the master and slave both establish an 8-byte send data buffer (spi send buf[8]) and an 8-byte receive data buffer (spi_re cv_buf[8]), and establish a complete data packet reception completion flag (spi_recv_flag). When the user needs to send data, the send data packet can be filled into the send buffer at any time. When the user needs to receive data, the receive flag can be tested at any time to see if it is set, so that the data packet sent by the other party can be obtained from the receive data buffer. According to the above protocol, after the SPI interface is set up, the user's data transmission and reception only needs to face the communication buffer set by this protocol, without having to pay attention to how the SPI interface works. This meets the requirements of bidirectional data transmission and random transmission and reception. The schematic diagram of the basic protocol construction is shown in Figure 3.

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Note: The host display device is LCD12864, and the slave display device is 8 digital tubes. To shorten the length of the article, the display driver is not listed. It can be seen from the program that the SPI interface receives a byte while sending a byte, which is the essential difference between SPI and other serial communication methods. In addition, the author tested it at a limit rate close to 1 MHz, and the data transmission was stable.

3 Design and implementation of advanced protocols
The basic protocol is relatively simple and can ensure that both parties can reliably transmit data, but the implementation of the above protocol depends on the slave interrupt mode. The SPI interrupt is shared with the UART serial interrupt. When the slave serial port is used for other communications, it is necessary to avoid mutual interference of communication interrupts. The communication configuration diagram of the complex electronic system is shown in Figure 4.

The serial port of the microcontroller in Figure 4 only sends data, but does not need to receive data, and serial communication only needs one-way data transmission. The query method is adopted, and the interrupt is not occupied. The serial interrupt No. 4 is used for SPI communication. Therefore, the SPI basic protocol can be used to complete the dual-machine communication function of the microcontroller. If there is a requirement for information interaction between the electronic system and the host computer, and the sent and received data are all random, the configuration mode of the system communication is shown in Figure 4.
The SPI communication and UART communication of machine No. 2 in Figure 4 are both slave modes. Since SPI and UART share an interrupt, the communication process will be abnormal. In severe cases, both SPI and UART communications cannot be carried out normally. The above protocol cannot meet the needs. For this reason, an advanced protocol is constructed based on the basic protocol.
Advanced protocol: Both the host and the slave use timers to send and receive SPI data frames. The timer is the engine of SPI communication, and the communication is initiated by the host timer. The slave only sends and receives passively. In order to ensure that the byte phase of the data packets of the SPI sender and receiver is matched, a data packet send and receive buffer must be set. The number of bytes in the send and receive buffer should be N times that of the data packet. At the same time, several packet marking bytes are set in the data packet, usually the head byte and the tail byte, so that the master and slave can dynamically calibrate the byte phase when receiving data to ensure the reliability of data reception. The schematic diagram of the high-level protocol structure is shown in Figure 5.

In Figure 5, the SPI communication data packet is 8 bytes, and the packet identification bytes are 0x0d and 0x0c. The SPI communication starts using the PCA timer mode. Readers can also use timers T1 and T2 to start SPI communication. The reference program is as follows:



Conclusion
With the development of single-chip microcomputer technology, serial expansion and serial communication have become the mainstream of single-chip microcomputer application technology. Users should master the development technology of various serial communication methods. Among them, the fast data transmission capability of the SPI communication method provides users with flexible communication protocols and guarantees the reliability of communication.