Microcontroller C8051F060 with high performance ADC

1 Introduction

Among the mixed-signal microcontrollers, the C8051F06X series of highly integrated mixed-signal microcontrollers newly launched by American Cygnal Company is unique. C8051F06X is a highly integrated system-on-chip microcontroller. It has up to 59 digital I/O ports, uses the core CIP-51 compatible with 8051, and has a speed of up to 25MI/s. This series of microcontrollers includes C8051F060/2 and C8051F061/3. Compared with other microcontrollers in the same family, its analog peripheral performance is excellent. In addition to an 8-channel 10-bit ADC with programmable amplifier and multiplexer, There are also two 16-bit ADCs with a sampling speed of up to 1 MS/s, two 12-bit DACs, three voltage comparators, an on-chip temperature sensor and a reference voltage source, etc. This article only takes the C8051F060 model as an example, focusing on the use of its high-speed, high-precision analog-to-digital converter.

2 High-precision analog/digital converter

The analog/digital conversion interface consists of two 16-bit successive approximation ADCs, integrated sample and hold, a programmable window detector, and a DMA interface. ADC0/ADC1 can be configured as single-ended or differential input mode. The working mode of analog/digital conversion, window detector and DMA interface can be controlled by software through special function registers. The analog/digital converter and its sample and hold circuit can also be set individually through special function registers, as shown in Figure 1. Obviously, the conversion startup method is flexible. Software events, external hardware signals and periodic timer overflows can all be used as trigger signals. After the conversion is completed, the 16-bit result is latched in the SFR and can be stored on-chip or on-chip through the DMA interface. External RAM.

2.1 Single-ended/differential input mode

ADCO and ADC1 can be programmed to work independently in single-ended input mode, or they can be set to cooperate with each other to receive differential input signals. When using single-ended input mode, the ADC can be configured to sample simultaneously or use different conversion speeds. When using differential input, ADC1 obeys ADC0, and its configuration is based on ADC0 except for zero point and gain calibration. The DIFFSEL bit of the channel selection register AMXOSL is used to select single-ended and differential input modes. When using differential input, what is input to the ADC is a pseudo differential signal, and the actual measured voltage of each ADC is equal to the voltage between the pin AIN and the pin AINDG. AINDG must be between -0.2V ~ 0.6V. In most systems, AINDG is connected to AGND. Otherwise, the AINDG signal will produce a slight negative bias. It is recommended to use the internal calibration function to solve it. AINOG and AIN1G must be connected together reliably. In order to obtain accurate conversion results, the AINn potential should be higher than AINnG in both ways.

2.2 Reference voltage

ADC0 and ADC1 can be configured with different reference voltage circuits, either using an on-chip precision reference voltage source or an off-chip reference voltage source. The on-chip reference voltage source circuit uses an independent temperature-stabilized bandgap reference voltage generator to generate a 1.25 V voltage, which is then amplified by a buffer amplifier 2 times. Its maximum load current cannot exceed 100μA. It is recommended that the VREF terminal and The VRGND terminal is connected to an external bypass capacitor of 0.1μF and 47μF. Each reference voltage circuit can be controlled separately by the reference voltage control register (REFnCN), where the BIASEn bit controls the enablement of the reference voltage generator and the REFBEn bit controls the enablement of the multiplication-by-2 buffer. When disabled, the power consumption of the internal reference voltage circuit is 1μA, and the buffer amplifier is in a high impedance state; when using the internal reference voltage source, both control bits must be set to 1; when using an external reference voltage source, the control bit REFBEn should be set to 0. It should be noted that no matter what reference voltage source is used, the BIASEn bit must be set to 1 when an analog-to-digital converter is used. When the analog-to-digital converter is not used, the BIASEn bit must be set to 0 to help reduce energy consumption.

2.3 Working methods

The maximum conversion speed of ADC0 and ADC1 is 1 MS/s. The conversion clock is generated by dividing the system clock and is set by the ADCnSC bit of the ADCnCF type register.

2.3.1 Conversion startup mode

For ADC0, there are four ways to start analog/digital conversion, which are determined by the conversion start mode bit AD0CMl/AD0CM0 in the ADC0CN type register. These four ways are to write 1 to the AD0BUSY bit of ADC0CN; overflow of timer 2; timing The overflow of device 3; the rising edge of the external ADC conversion start signal CNVSTR0 is detected. For ADC1, there are five ways to start analog/digital conversion, which are determined by the conversion start mode bits AdlCM12-AD1CM0 in the register ADC1CN. The five ways are to write l to the AD1BUSY bit of ADC1CN; overflow of timer 2; timer 3 overflow; detect the rising edge of the external ADC conversion start signal CNVSTR; write 1 to the AD0BUSY bit of ADC0CN.

During the analog/digital conversion process, the ADnBUSY bit is set to 1. After the conversion is completed, the bit is cleared. If interrupts are enabled, the falling edge of the ADnBUSY signal will trigger an interrupt and set the interrupt flag bit ADCnON of ADnINT. 5. In single-ended mode, the result data of analog/digital conversion is stored in ADCnH and ADCnL; in differential mode, the result data of analog/digital conversion is the sum of ADC0 and ADC1, which is stored in ADC0H and ADC0L. When starting analog/digital conversion by writing 1 to the AD0BUSY bit of ADC0CN, the ADnINT bit should be queried to determine when the analog/digital conversion is completed. The recommended query steps are to write 0 to ADnINT; write 1 to ADnBUSY; and query the ADnINT bit. Whether it is l; when processing ADC data, when in differential mode and starting analog/digital conversion with an external signal, pin CNVSTR0 and pin CNVSTR1 should be connected.

2.3.2 Sample and hold mode

The sampling and holding mode of analog/digital conversion is controlled by the ADCnTM bit of the ADCnCN type register. Once ADCn is started, its input will be continuously sampled, and the conversion has not yet started. When the AdnTM bit is 1, the conversion begins, and a sampling period is Composed of 18 SAR clocks. When a conversion is initiated with the CNVSTRn signal, the ADC samples until a rising edge occurs on pin CNVSTRn. Setting the AdnTM bit to 1 ensures that the necessary settling time is met when the analog input is connected to an external multiplexer.

2.3.3 Establishment time

If the input of the ADC is a high-speed fast-changing signal, such as the switching of an external multiplexer or other transition signals, a minimum following time is required before conversion. This time depends on the input resistance of the ADC, the sampling capacitor, and the external equivalent Resistance and the desired conversion accuracy, the equivalent time constant is the same for single-ended input and differential input. The settling time required for a given accuracy can be estimated by the following formula:

Where A is the required accuracy, taking the decimal part of LSB; t is the required settling time (seconds); n is the number of digits of the ADC (16); RT is the sum of the input resistance of the ADC and the external equivalent resistance; Cs is Sampling capacitor.

2.4 Calibration

The analog-to-digital converter has been calibrated for nonlinearity, zero offset and gain error at the manufacturer, but these parameters of ADC0 and ADC1 can also be calibrated separately in the system. Calibration is performed through the corresponding bits of the ADC0 and ADC1 configuration registers. The calibration parameters can be read and written by the ADC calibration indication register (ADC0CPT) and the ADC calibration parameter register (ADC0CCF). The CPTR bit of ADC0CFF is used to read and write specific calibration to ADC0CCF. parameter. Under normal circumstances, there is no need to perform nonlinear correction. If you want to perform this kind of correction, set the ADCnLCAL bit to 1 to start. After the correction is completed, the hardware sets the ADCnLCAL bit to 0, and the correction parameters are stored in the correction unit. When performing zero point and gain calibration, you can use an internal or external voltage source as the calibration source, set by the ADCnSCAL bit. In order to ensure accuracy, it is recommended to perform zero point calibration first and then gain calibration. Zero point calibration can be started by setting the ADCnOCAL bit to 1. After the calibration is completed, the ADCnOCAL bit is set to 0 by hardware. The offset error that zero point calibration can compensate is ± of the full scale. 3. 125%, the offset value is added to the AINnG input before the ADC is digitized; the gain calibration can be started by setting the ADCnGCAL bit to l. After the calibration is completed, the ADCnGCAL bit is set to 0 by the hardware, and the gain calibration can compensate for the nonlinearity. The error is about ±3.125%, and the gain value is added to the VREF path of the ADC to change the slope of the converter transfer function.

2.5 Programmable window detector

ADC0 has a programmable window detector that continuously compares the output of ADC0 with user-set limit values ​​and monitors whether the system's over-value conditions are met. This is particularly useful in interrupt-triggered systems, which can not only save code space and CPU bandwidth, but also provide fast response time. The interrupt flag of the window detector can also be used in polling mode. This flag is the AD0INT bit in the special function register (ADC0CN). The high and low bytes of the reference word are loaded into the ADC lower limit (greater than) and upper limit (less than) registers (ADC0GTH/ADC0GTL and ADC0LTH/ADC0LTL) respectively. Both single-ended and differential modes can use window detectors. In single-ended mode, the window detector compares the output of the register (ADC0GTx/ADC0LTx) with ADC0, while in differential mode, the combined output of ADC0 and ADC1 is used for comparison. It should be noted that the window detector flag can be set or reset when data falls within or outside the programmed limits, depending on how the registers (ADC0GTx and ADC0LTx) are programmed.

3 Application examples

Figure 2 shows the schematic block diagram of a miniature spring automatic testing and sorting system. The microcontroller (C8051F060) is the control center of the system. It generates a DC voltage through the output of the 12-bit DAC and sends it to the intensifier. The intensifier will make The spring generates deformation and displacement, and the displacement is measured by the displacement sensor. The output voltage of the sensor is sent to the Ain input terminal, and the displacement is obtained through 16-bit A/D conversion. According to the physics Hooke's theorem formula: F=-kS, the single-chip computer can be used Calculate the elastic coefficient k value of the spring. In the figure, the LED array is used to indicate different k values. Since the C8051F060 microcontroller has as many as 59 digital I/O ports, the liquid crystal display LCD interface is used. The LED indication matrix interface and keyboard scanning interface do not require too many external expansion circuits, simplifying the system and improving reliability.

4 Conclusion

In recent years, with the continuous development of large-scale integrated circuit manufacturing technology, the performance of the analog interface of mixed-signal microcontrollers has been further improved, especially the function of ADC has become more complete, with accuracy ranging from 10 bits, 12 bits, to 16 bits or even 24 bits, but comprehensive Considering factors such as sampling speed, the C8051F06X series of microcontrollers has become one of the few system-on-chip mixed-signal microcontrollers with 16-bit precision and 1 MS/s sampling speed, as well as other flexible and diverse configurable functions. It is foreseeable that this series of microcontrollers will be widely used in data collection and intelligent instrumentation.