The implementation of SPI bus in 51 single chip microcomputer system

1 Introduction

SPI (Serial Peripheral Interface) bus system is a synchronous serial peripheral interface, which enables MCU to communicate with various peripheral devices in serial mode to exchange information. Peripheral settings include FLASHRAM, network controller, LCD display driver, A/D converter and MCU. SPI bus system can directly interface with a variety of standard peripheral devices produced by various manufacturers. The interface generally uses 4 lines: serial clock line (SCK), host input/slave output data line MISO, host output/slave input data line MOST and low-level effective slave select line SS (some SPI interface chips have interrupt signal lines INT or INT, and some SPI interface chips do not have host output/slave input data line MOSI). Since the SPI system bus only needs 3 to 4 data lines and control to realize the interface with various I/O devices with SPI bus interface function, while the extended parallel bus requires 8 data lines, 8 to 16 address lines, and 2 to 3 control lines, the use of SPI bus interface can simplify circuit design, save a lot of interface devices and I/O lines in conventional circuits, and improve the reliability of design. It can be seen that in intelligent instruments and industrial measurement and control systems composed of single-chip microcomputers such as the MCS51 series that do not have SPI interfaces, when the transmission speed requirement is not too high, the use of the SPI bus can increase the types of application system interface devices and improve the performance of the application system.

2 Composition of SPI bus

The SPI bus can be used to construct various systems under software control. For example, a master MCU and several slave MCUs, several slave MCUs connected to each other to form a multi-host system (distributed system), a master MCU and one or several slave I/O devices to form various systems, etc. In most applications, an MCU can be used as a controller to control data and transmit the data to one or several slave peripheral devices. The slave device can only receive or send data when the host sends a command. The data transmission format is the high bit (MSB) first and the low bit (LSB) later. The typical structure of the SPI bus interface system is shown in Figure 1.

When a master is connected to several different serial I/O chips via SPI, the enable control terminal of each chip must be used, which can be achieved through the output line of the MCU's I/O port. However, special attention should be paid to the input and output characteristics of these serial I/O chips: first, whether the serial data output of the input chip has a three-state control terminal. When the chip is not selected, the output terminal should be in a high-impedance state. If there is no three-state control terminal, a three-state gate should be added externally. Otherwise, the MISO terminal of the MCU can only connect to one input chip. Secondly, whether the serial data input of the output chip has an enable control terminal. Therefore, only when this chip is allowed, the SCK pulse will move the serial data into the chip; when it is prohibited, SCK has no effect on the chip. If there is no enable control terminal, SCK should be controlled by a gate circuit in the periphery and then added to the clock input terminal of the chip; of course, it is also possible to connect only one chip to the SPI bus without connecting other input or output chips.

3 Implementation Method in MCS51 Series MCU

For MCS51 series microcontrollers without SPI serial bus interface, software can be used to simulate SPI operation, including serial clock, data input and data output. For different serial interface peripheral chips, their clock timing is different. For devices that input (receive) data on the rising edge of SCK and output (send) data on the falling edge, the initial state of its serial clock output port P1.1 should generally be set to 1, and P1.1 should be set to 0 after the interface is enabled. In this way, while the MCU outputs 1-bit SCK clock, it will shift the interface chip serially to the left, thereby outputting 1-bit data to the P1.3 port of the MCS51 microcontroller (simulating the MISO line of the MCU), and then setting P1.1 to 1, so that the MCS51 series microcontroller outputs 1-bit data (high first) from P1.0 (simulating the MOSI line of the MCU) to the serial interface chip. At this point, the simulation of 1-bit data input and output is declared complete. After that, set P1.1 to 0 to simulate the input and output of the next 1-bit data..., repeat this cycle 8 times to complete the operation of transmitting 8-bit data through the SPI bus. For devices that input data on the falling edge and output data on the rising edge of SCK, the initial state of the serial clock output should be 0, that is, when the interface chip allows, first set P1.1 to 1 so that the peripheral interface chip outputs 1-bit data (MCU receives 1-bit data), and then set the clock to 0 so that the peripheral interface chip receives 1-bit data (MCU sends 1-bit data), thereby completing the transmission of 1-bit data.

Figure 2 shows the hardware connection diagram of the MCS51 series microcontroller and the memory X25F008 (E2PROM). In Figure 2, P1.0 simulates the data output terminal (MOSI) of the MCU, P1.1 simulates the SCK output terminal of the SPI, P1.2 simulates the slave selection terminal of the SPI, and P1.3 simulates the data input terminal (MISO) of the SPI. The following introduces three subroutines for simulating SPI serial input, serial output, and serial input/output using the assembly language of the MCS51 microcontroller. In fact, these subroutines are also applicable to various other serial peripheral interface chips (such as A/D conversion chips, network controller chips, LED display driver chips, etc.) that input at the rising edge and output at the falling edge of the serial clock. For various serial peripheral interface chips with falling edge input and rising edge output, as long as the output level sequence of P1.1 is changed, that is, P1.1 is set to a low level first, then P1.1 is set to a high level again, and then P1.1 is set to a low level..., these subroutines are also applicable.

3.1 MCU serial input subroutine SPIIN

The application subroutine to receive 8-bit data from the SPISO line of X25F008 and put it into register R0 is as follows:

SPIIN: SETB P1.1; Make P1.1 (clock) output 1

CLR P1.2 ;Select slave

MOV R1, #08H; set the number of loops

SPIIN1:CLR P1.1; Make P1.1 (clock) output 0

NOP ; Delay

NOP

MOV C, P1.3; slave output SPISO sends carry C

RLC A ; shift left to accumulator ACC

SETB P1.1; Make P1.0 (clock) output 1

DJNZ R1,SPIIN1; Determine whether to loop 8 times (8-bit data)

MOV R0, A; 8-bit data is sent to R0

RET

3.2 MCU serial output subroutine SPIOUT

The procedure to transfer the contents of the R0 register in the MCS51 microcontroller to the SPISI line of the X25F008 is as follows:

SPIOUT: SETB P1.1; Make P1.1 (clock) output 1

CLR P1.2 ;Select slave

MOV R1,#08H ; Set the number of loops

MOV A, R0; 8-bit data sent to accumulator ACC

SPIOUT1: CLR P1.1; Make P1.1 (clock) output 0

NOP ; Delay

NOP

RLC A ; Left shift to the highest bit of the accumulator ACC to C

MOV P1.0, C; Carry C is sent to the slave input SPISI line

SETB P1.1; Make P1.1 (clock) output 1

DJNZ R1, SPIOUT1; Determine whether to cycle 8 times (8-bit data)

RET

3.3 MCU serial input/output subroutine SPIIO

The program to transfer the contents of the R0 register of the MCS51 microcontroller to the SPISI of the X25F008 and receive 8-bit data from the SPISO of the X25F008 is as follows:

SPIIO: SETB P1.1; Make P1.1 (clock) output 1

CLR P1.2 ; Select slave

MOV R1, #08H; set the number of loops

MOV A, R0; 8-bit data is sent to accumulator ACC

SPIIO1: CLR P1.1; Make P1.1 (clock) output 0

NOP ; Delay

NOP

MOV C, P1.3; slave output SPISO sends carry C

RLC A ; Left shift to the highest bit of the accumulator ACC to C

MOV P1.0, C; Carry C is sent to the slave input

SETB P1.1; Make P1.1 (clock) output 1

DJNZ R1, SPIIO1; Determine whether to loop 8 times (8-bit data)

RET

4 Conclusion

This article introduces the implementation method of data transmission through the SPI bus interface, and gives the subroutine of simulating the input and output of the SPI serial bus with the assembly language of the MCS51 microcontroller, and the input/output to transmit 8-bit data. In fact, the SPI bus interface can also be implemented on the MCS96 series, ATMEL89 series and other microcontrollers according to the operation timing characteristics of the SPI serial bus.