Design of wireless transceiver circuit based on 51 single chip microcomputer

0 Introduction

Data acquisition and transmission systems are the basis of modern measuring instruments. They are widely used in industrial measurement and control, medical monitoring and experimental research. When the data acquisition point is in a non-fixed position or in motion, the data acquisition system must be separated from the host. At the same time, it needs to be powered by batteries. Therefore, a data acquisition and transmission system composed of wireless transceiver circuits or modules is an effective solution. Typical wireless transceiver circuits or modules include wireless sensor network sensor nodes using 2.4 GHz communication frequency, remote control modules and data transmission modules using 433/868/915 MHz communication frequency, and GSM modules using 900/1 800 MHz communication frequency. However, existing wireless transceiver circuits or modules are prone to cause the system to be too large and power consumption is high, which cannot fully meet the needs of portable monitoring systems powered by batteries, especially when large-scale and intensive deployment is required and only short-range communication is required. Traditional wireless communication modules are prone to cause network communication blockage, reduce network capacity, increase node power consumption, and shorten node life.

Here, the C8051F340 single-chip microcomputer is used as the monitoring terminal controller, and the C8051F330D single-chip microcomputer is used as the detection node controller. The circular hollow antenna is wound by enameled wire to form the wireless transceiver circuits of the monitoring terminal and the detection node respectively, realizing the wireless data transmission function.

1 Hardware Circuit Design

The system is mainly composed of monitoring terminal, detection node and antenna, and the hardware structure block diagram is shown in Figure 1. In Figure 1, the LCD display is connected to the monitoring terminal for debugging purposes to display the number of the detection node, the transmitted data and other information. The transceiver circuits are self-wound into a circular hollow coil antenna with a diameter of (3.4±0.3) cm using enameled wire with a diameter of 0.8 mm.

Figure 1: Hardware block diagram of wireless transceiver circuit

1.1 Transmitter circuit

The hardware circuits of the monitoring terminal and the detection node are similar. The monitoring terminal displays the detection node number, transmitted data and other information through the LCD and is powered by a 5 V switching power supply. The detection node does not have an LCD display and is powered by 2 ordinary dry batteries to form a 3 V power supply. The transmitting circuit uses the microcontroller PCA register to generate an oscillation frequency of 3 MHz and directly controls the LC resonant coil to oscillate. The C8051F330D microcontroller has a sleep mode that can reduce the power consumption of the node circuit. Its internal programmed counter array (PCA0) provides an enhanced timer function, which does not occupy additional CPU resources compared to the standard 8051 counter/timer. PCA0 is used to generate a 3 MHz carrier frequency and output it in a push-pull manner to increase the transmission power of the subsequent resonant circuit. [page]

1.2 Receiving amplifier circuit design

The receiving amplifier circuit is composed of the AD8656 dual op amp chip. This op amp is suitable for power supply of +2.7~+5.5 V power supply voltage and is a precision dual operational amplifier with low noise performance. The AD8656 CMOS amplifier provides a maximum precision offset voltage of 250 mV within the full common mode voltage (VCM) range, and provides low voltage noise spectrum density and 0.008% low true at 10 kHz. No external triode gain stage or multiple parallel amplifiers are required to reduce system noise. The receiving amplifier circuit is powered by a 3V single power supply provided by a dry battery, as shown in Figure 2. The amplifier circuit is amplified by AD8656 in two stages to offset the attenuation of the signal voltage amplitude induced by the coil due to the increase in distance, amplify the received weak signal, and increase the wireless transmission distance. The output voltage of the system receiving circuit after amplification by D8656 is input to the microcontroller for A/D conversion and data encoding and decoding, but the detection and demodulation circuit is not used, which can effectively simplify the circuit structure.

Figure 2 AD8656 receiving amplifier circuit diagram

2 Circuit parameter determination

2.1 Transmitter circuit design calculation

The transmitting circuit is controlled by the PCA inside the microcontroller, and uses the 12 MHz crystal oscillator inside the microcontroller. The frequency output mode is used to generate a frequency-programmable square wave at the CEXn pin of the microcontroller. The frequency of the generated square wave is determined by formula (1).

To generate a 3 MHz frequency, PCA0CPHn=0x02 is calculated, and the MCU frequency is divided by four. Therefore, the value of register PCA0 can be set by the MCU software to generate a 3 MHz carrier signal at the PCA0 port.

2.2 Receiver Circuit Design Calculation

The receiving amplifier circuit is shown in Figure 2. The receiving resonant frequency is adjusted by adjusting the capacitor VC1. The transmitting circuit frequency is 3MHz, and the inductance of the wound coil is measured by the instrument to be 1.8~1.85 μH. The required resonant capacitor is calculated by formula (2):

It is calculated that C=1501~1543pF, and a ceramic capacitor of 152 and a 100pF adjustable capacitor are selected and connected in parallel to the circuit.

A bias voltage Vr is added to the positive input terminal by using R1 and R2 to make the amplifier circuit work. Its value is calculated by formula (3).

R3 and R4 control the gain of the circuit. Let R3 = 1 kΩ and R4 = 10 kΩ. Then the gain of the AC signal in the first stage is Av = R4/R3 = 10. In order to prevent the signal from being filtered out, the second stage uses an inverting amplifier circuit. The bias voltage remains unchanged, and the gain is Av = R8/R7 = 5. From the above calculation, it can be seen that after the received signal passes through the operational amplifier, the total gain reaches 50 times, the maximum peak-to-peak value of the signal reaches 2.8 V, and the minimum peak-to-peak value reaches 0.3 V. The A/D conversion is performed by the single-chip microcomputer to determine whether the signal exists.

3 Software Design

The system directly converts the amplified sinusoidal signal through the A/D conversion function in the single-chip microcomputer. Continuously detect 100 times, obtain the peak and valley values, and then calculate the peak-to-peak value of the signal. Since the measured noise level is about 0.15 V, when the peak-to-peak value of the signal is greater than 0.3 V, it can be regarded as a received signal, and the bit error rate can be reduced by the mean filtering method.

When sending data, a pulse is sent first, followed by a valid bit within 1.2ms, and then a low level is maintained for 3.6ms. After sending 8 times in succession, that is, one byte, the low level is maintained for about 18ms to prepare for sending the next byte.

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When receiving a signal, it determines whether it is ready to send valid data by judging the low level time. When the low level exceeds 9 ms, the receiving program is started. After detecting the pulse, it delays 1.2 ms to start reading data. After reading 8 times in a row, a byte is saved. The timing diagram is shown in Figure 3.

Figure 3 Communication protocol timing diagram

The ASK modulation function is implemented by software programming. The transmitting flow chart and the receiving flow chart are shown in Figure 4 and Figure 5 respectively.

Figure 4 Transmission flow chart

Figure 5 Receiving flow chart

4 Conclusion

The detection node sends data to the monitoring terminal. When the LCD screen of the monitoring terminal indicates "reception successful", it means that communication is possible at this distance. The distance between the node coil and the terminal coil is continuously increased until data cannot be received normally. The test shows that the effective communication distance can reach 24 cm. When the detection node communicates normally with the monitoring terminal through bridging, the average power consumption of the bridge node is measured to be about 102 mW, and the average bridge distance between the detection nodes is about 20 cm.

Compared with traditional wireless transceiver modules, wireless transceiver circuits based on C8051F series microcontrollers have broad application prospects in situations where large-scale, intensive deployment, short-range wireless communication is required and circuit size, power consumption, and cost are limited.