A new type of single chip microcomputer MSC1210 and its application

Practical application systems often require high-precision measurement, and must also perform real-time and rapid control to improve their development efficiency. For this reason, people often use high-precision A/D chips and microcontroller systems with ISP development functions to achieve this. Texas Instruments (TI) MSC1210 microcontroller solves the above problems. It integrates an enhanced 8051 core, a clock cycle of up to 33 MHz, 8-channel 24-bit high-precision Σ-Δ A/D converters, Flash memory, etc. Its system functions and structural block diagram are shown in Figure 1.

　　MSC1210 has the following key features:

　　◇ 3 16-bit timers, 16-bit PWM wave output;

　　◇ Up to 21 interrupt sources;

　　◇ 32 digital input/output ports with watchdog;

　　◇ 8-channel ADC provides a 24-bit resolution programmable solution without missing codes;

　　◇ The programmable gain amplification (PGA) is adjustable between 1 and 128, which greatly improves the accuracy of the ADC;

　　◇ The power supply is 2.7~5.25 V, the power consumption is less than 4 mW at 3 V, and the current in stop mode is less than 1μA;

　　◇ The kernel is compatible with 8051, the instructions are fully compatible with 8051, and the original 8051 development system can be used;

　　◇ The clock frequency can reach 33 MHz, the single-cycle instruction execution speed reaches 8 MIPS, and the execution speed is 3 times faster than the standard 8051;

　　◇ Up to 32 KB Flash memory, SRAM up to 1.2 KB, externally expandable to 64 KB memory;

　　◇ Flash can still be programmed serially or in parallel when the voltage is as low as 2.7 V, and can perform 100,000 erase/write operations;

　　◇ With 32-bit accumulator;

　　◇ It has power management function, capable of low voltage detection and on-chip power-on reset;

　　◇ SPI port with FIFO, dual UART;

　　◇ 64TQFP package, the hardware and pins of the MSC1210 series are fully compatible and can be interchanged if necessary.

Figure 1 System structure and functional block diagram

1 The core is compatible with 8051 but faster and more powerful

　　All instructions of the MSC1210 series function the same as the standard 8051 and have the same impact on bits, flags and registers, but the timing is different. The MSC120 microcontroller uses a streamlined 8051 core. Under the same external clock, its execution speed is 1.5 to 3 times faster than the standard 8051 (each instruction has a difference of 4 clock cycles and 12 clock cycles). Under the same instructions and clock, the speed is increased to more than 2.5 times. Therefore, an MSC1210 clocked at 33 MHz executes at the same speed as a standard 8051 clocked at 82.5 MHz. The difference can be seen in Figure 2; and the MSC1210's timers and counters can be selected to count every 12 or 4 clock cycles. .

　　MSC1210 provides a dual data pointer (DPTR) to accelerate the movement speed of data blocks. It can adjust the read and write speed according to the speed of the external memory, changing between 2 and 9 instruction cycles; it also provides a 16-bit address bus for the external memory ( P0 and P2). The low-order address is multiplexed through the P0 port, and the hardware can control whether the P0 and P2 ports are used as address lines or as general-purpose I/O.

　　In order to better improve efficiency, peripheral equipment has also been improved on the basis of 8051. For example, the SPI port adds a FIFO, so that there is a buffer interval for transmitting data. The use of a 32-bit accumulator will greatly reduce the burden on the CPU when processing multi-byte data from ADC samples or other data sources, so that 24-bit addition and shifting can be completed in a few instruction cycles without using data through software. Hundreds of instruction cycles to complete.

　　The hardware and pins of the MSC1210 series are fully compatible. For users, the only difference is the memory configuration. The program code written on MSC1210Y2 can be directly executed on MSC1210Y3, MSC1210Y4, and MSC1210Y5. Users can add or subtract software functions and configure them with different CPU models. MSC1210 has become a standard device with several different application platforms.

The development tools of MSC1210 are fully compatible with the 8051 development system. Users can use the original 8051 development system, the development system of the DEMO board or the development tools provided by third-party supporters.

2 24-bit high-resolution ADC channels

　　(1) ADC input multiplexer and input buffer

　　The input multiplexer allows different input signals to be combined by selecting the input channel. For example, AIN0 is selected as the ADC input positive terminal, and any other channel can be selected as the ADC input negative terminal. In this way, 8 complete ADC input channels can be formed, and the polarity can also be switched between differential input channels. On-chip diodes can provide temperature measurement. When the input multiplexer register is set to all "1"s, the diode is connected to the input of the ADC channel to start measuring temperature.

　　The input resistance of MSC1210 is 5M/PGA without buffer, and the buffer is controlled by the BUF bit in the ADC control register. When the input buffer is not selected, the analog input impedance is related to the clock frequency (ACLK) and gain (PGA), and the relationship is:

　　　The equivalent structure of its analog input channel is shown in Figure 3.

　　(2) Programmable gain amplifier PGA

　　① PGA: Programmable gain amplification PGA can be set to 1, 2, 4, 8, 16, 32, 64, 128. Using PGA can indeed improve the resolution of the ADC. When PGA=1, the measuring range is 5 V, the ADC can resolve to 1μV; when PGA=128, the measuring range is 40 mV, the ADC can resolve to 75 nV; and when PGA=1, within the 5 V measuring range A 26-bit ADC is required to resolve 76 nV.

　　② PGA offset DAC: The ODAC register is 8 bits. It can offset the analog signal input to the PGA by half of the full scale of the PGA. The highest bit is the sign bit, and the lower 7 bits provide the offset. Since ODAC introduces analog rather than digital offset to the PGA, it does not affect the accuracy of the measurement results.

　　(3) Voltage reference standard

The voltage reference of MSC1210 can be internal or external. The voltage reference after power-on reset is internal 2.5 V. The selection of the reference voltage is controlled by ADCON0. The on-chip internal reference voltage is available in 1.25 V and 2.5 V, with an accuracy of up to 0.2% and a temperature drift of only 5×10-6/℃, which can greatly improve the measurement accuracy. If the internal reference voltage is not used, it should be turned off to reduce noise and power consumption. A 0.1μF decoupling capacitor should be placed at the VREFOUT pin. The external reference voltage is the difference between REF IN+ and REF IN-. The absolute voltage on the pin is between AGND and AVDD, but its differential level cannot exceed 2.6 V.

3 on-chip memory

　　MSC1210 includes on-chip 1.2 KB SRAM, 256 bytes DARAM, 2KB boot ROM, and 32 KB Flash memory.

　　MSC1210 uses a memory addressing table to distinguish program storage space and data storage space. The program space is automatically read by the microcontroller, and the program space is read through the instruction MOVC; the data space is read and written through the instruction MOVX. When on-chip storage is enabled, reading and writing within the on-chip range will be performed on the on-chip memory, and off-chip memory is implemented through P0 and P2 addressing. The external memory can be accessed by setting bits 0 and 1 of the HCR1 register to 0. At this time, all on-chip and off-chip memory spaces can be accessed through the P0 and P2 ports. For safety reasons, all P0 ports are set to 0 during access to on-chip memory.

　　The MSC1210 contains 1.2 KB of on-chip SRAM. The SRAM starting address bit is "0", which is read and written through the MOVX instruction. SRAM can also start from 8400H, which can be used as both program space and data space.

　　MSC1210 has 256 bytes of DARAM with addresses 0000H~00FFH, of which 128 bytes are 128 SFRs with addresses 0080H~00FFH. The SFR register is used for control and status. Standard 8051 functions and additional functions of MSC1210 are implemented through SFR. A "0" will be obtained from an undefined SFR register, and the result obtained by writing to an undefined SFR is undetermined. Another use of DARAM is to use the stack pointer of SFR as a stack.

　　During serial or parallel programming, there is a 2KB boot ROM to control the operation. In user mode, BOOT ROM is located at F800H~FFFFH; in programming mode, BOOT ROM is located at the beginning 2K of the program space.

　　Flash memory can be used as both program storage space and data storage space. Users can flexibly configure the size of program and data storage space. The partition size is determined by hardware configuration bits and can be programmed in a serial or parallel manner. In user application mode, both program and data Flash storage spaces are readable and writable.

4 Flash programming applications

　　The programmable Flash memory is divided into 4 parts: 128-byte configuration part, reset vector, program storage space, and data storage space.

　　Flash programming mode has two modes: serial and parallel, which are determined by ALE and signal status during power-on reset. When ALE=1,=0, the serial programming mode is selected; when ALE=0,=1, the parallel programming mode is selected. When ALE and both are high, MSC1210 runs in user mode; when ALE and both are low, MSC1210 is not defined.

　　The initial values ​​of the Flash memory of the MSC1210 are all "1". The parallel programming mode includes a dedicated programmer. The serial programming method is usually online programming. The user application mode allows programming of the Flash program and data memory. The actual code for Flash programming cannot be executed from Flash, but must be executed from BOOT ROM or RAM.

　　MSC1210 has two hardware configuration memories (HCR0, HCR1), which are programmable in Flash programming mode. By programming these two memories, the user can define partitions between program memory space (PM) and data memory space (DM), as listed in Table 1.

Table 1 Flash partition of MSC1210

HCR0	MSC1210Y2		MSC1210Y3		MSC1210Y4		MSC1210Y5
DFSEL	PM/KB	DM/KB	PM/KB	DM/KB	PM/KB	DM/KB	PM/KB	DM/KB
000	0	4	0	8	-	-	-	-
001	0	4	0	8	-	-	0	32
010	0	4	0	8	0	16	16	16
011	0	4	0	8	8	8	twenty four	8
100	0	4	4	4	12	4	28	4
101	2	2	6	2	14	2	30	2
110	3	1	7	1	15	1	31	1
111 (default)	4	0	8	0	16	0	32	0

　　Note: When the program space is 0KB, the program is executed off-chip; "one" means reserved.

　　Users can read and write Flash memory through the MOVX instruction, regardless of whether the Flash memory is defined as program memory or data memory. This means that users can divide the entire space into program storage space and use the program space as data storage space. When the program space pointed to by the PC pointer actually stores data, unpredictable consequences will occur. Therefore, when you want to use Flash to store data, you must use a Flash partition. The Flash partition prohibits the execution of programs in the data storage space. Similarly, erasing and writing in the program space is also prohibited and reading and writing in the data storage space are allowed.

5 Conclusion

　　MSC1210 is a high-performance microcontroller with a core compatible with 8051. Its development convenience, flexibility and use of high-precision ADC meet the requirements of users. Its instruction execution speed is what real-time systems desire, and it can be widely used in industrial processes. Control, medical instruments, smart sensors and other fields.