Comparative Analysis of High Current LED Dimming Methods

As the market for LED displays continues to grow, high contrast has become a buzzword. Recently, a major electronics manufacturer in the industry launched a high-definition 70-inch LCD TV with dynamic LED backlight control, which has a contrast ratio of 500,000:1 and consumes half the power. The company attributes such a high contrast ratio to the use of dimming technology.

Contrast ratio is generally defined as the ratio of the luminance of the brightest color (white) to the darkest color (black) that a system can produce. The brightness level of an LED can be adjusted by controlling the forward current entering it, which is analog dimming. The color of an LED can shift as the forward current changes, so analog dimming is a suitable choice for some low-end lighting systems that can tolerate color shifts. However, for high-end applications such as LED-based LCD displays, more complex dimming techniques must be used to achieve the desired color consistency and various brightness levels. LED drivers for high-end applications generally use fixed-frequency operation mode and PWM dimming mechanism. In PWM dimming, the LED forward current switches between 0% and 100% with a reduced duty cycle to control brightness. However, the frequency of the PWM dimming signal must be greater than 100Hz to avoid flickering or jitter. To minimize audible noise and radiation, the dimming frequency range of high-end lighting systems generally requires tens of kilohertz. However, higher dimming frequencies will significantly reduce the dimming range of the driver, which in turn reduces the maximum brightness of the system. This article will explore the performance of high-frequency PWM dimming technology in a buck LED driver with fixed frequency, time-delay hysteresis control and fixed on-time, and use test data to measure the performance under different configurations.

Dimming range

In PWM dimming, the LED forward current is switched on/off with a controlled duty cycle (DDim) to achieve the desired brightness level. The dynamic range of DDim defines the maximum brightness level that can be achieved with the PWM dimming configuration. As mentioned above, the LED brightness is proportional to the LED forward current, so the highest and lowest LED current average values ​​obtained when using the PWM dimming configuration are expressed by Equation 1 and Equation 2, respectively.

ILED_Max=DDim_Max×ILED (1)

ILED_Min=DDim_Min×ILED (2)

Among them, ILED is the LED current, ILED_Max is the average maximum value of the LED current, ILED_Min is the average minimum value of the LED current, DDim_Max is the maximum dimming duty cycle, and DDim_Min is the minimum dimming duty cycle. Therefore, the ratio of the highest and lowest LED brightness is also regarded as the PWM dimming range, which is expressed by formula 3.

Dimming range = DDim_Max/DDim_Min (3)

Equation 3 shows the relationship between the PWM dimming range and the maximum and minimum dimming duty cycles. For a given dimming frequency FDim, DDim_Max represents the maximum duty cycle, which is the time it takes for the LED current to decrease from the desired forward current to zero before the next dimming cycle begins; DDim_Min represents the minimum duty cycle, which is the time it takes for the LED current to increase from zero to the desired forward current (IF).

As can be seen from FIG1(a), DDim_Max and DDim_Min are expressed by equation 5.

DDim_Max＝(T-tSD)/T (4)

DDim_Min＝(tD+tSU)/T (5)

Where T is the dimming period (T = 1/FDim), tD is the delay from the rising edge of the DIM pulse to the first pulse of the power FET, tSU is the rise time of the LED current from zero to the desired current, and tSD is the fall time from the falling edge of the DIM pulse to the LED current equaling zero.

Figure 1(a): Maximum and minimum PWM dimming duty cycles; Figure 1(b): Most commonly used PWM dimming configurations.

Equations 4 and 5 express the relationship between DDim_Max, DDim_Min, the power-train characteristics of the LED driver, and the PWM dimming scheme. Several different PWM dimming schemes are discussed below.

PWM dimming solution

Several different circuits can be used to achieve on/off switching of the forward LED current. Figure 1(b) shows the most commonly used PWM dimming configuration.

In the enable dimming scheme (Figure 1b (A)), the LED current is turned on/off by setting the switching regulator or power FET driver to enable (Enable) or disable (Disable). The disadvantage of enable dimming is the large dimming delay (tD, tSU & tSD). tD refers to the time required to start the switching regulator circuit. This delay can be eliminated if the dimming signal is used to turn on/off the power FET driver instead of the switching regulator. tSU and tSD refer to the time required for the inductor current to rise to the required LED current and then drop the current to zero current. This delay depends largely on the transmission characteristics of the LED driver. The enable dimming scheme can provide a larger dimming range at a low dimming frequency. However, due to the large dimming delay, if the dimming frequency is increased, the dimming range will be significantly reduced.

The serial dimming scheme (Figure 1b(B)) connects a switch in series with the LED so that the switching of the LED current from IF to zero is performed as the serial switch is turned on and off. In this configuration, a peak detector is used to ensure the continuity of the voltage signal at the feedback pin (FB) when the serial switch is turned on. Serial dimming has no delay time tD and tSD, so it is better than enable dimming. However, this method has a larger tSU and a smaller dimming range at high dimming frequencies.

The parallel dimming scheme (Figure 1b(C)) connects a shunt switch in parallel with the LED. Once the switch is set to OFF or ON, a current IF will flow into or out of the LED immediately. Parallel dimming can significantly reduce tD, tSU, and tSD because it can maintain a continuous inductor current for a long time, and the average value of this current is approximately equal to the required LED forward current. Therefore, this dimming configuration is suitable for applications that require a wide dimming range at a high dimming frequency. However, parallel dimming must be used with a switching regulator topology because only this layout can provide a continuous output inductor current. In addition, this approach will reduce the efficiency of the overall system due to the power dissipation of the shunt switch. The following will explore the performance of enable dimming and parallel dimming schemes when working with fixed frequency, hysteresis, and fixed on-time buck LED drivers.

Dimming of Fixed Frequency Buck LED Drivers

A simplified block diagram of a fixed frequency current mode buck LED driver is shown in Figure 2. The driver can be configured for enable dimming or parallel dimming by selecting either Enable_Dim control or Shunt_Dim control. Figure 3 shows the typical enable dimming waveforms of the LED driver in Figure 2, which are generated using the LM3045 (1A, 16MHz fixed frequency LED driver).

Figure 2: Simplified block diagram of a fixed-frequency, current-mode buck LED driver.

In Figure 3, there is a delay of approximately 50μs, tD, from the rising edge of the DIM pulse to the first pulse of the power FET. This delay is related to the circuitry of the startup regulator as mentioned earlier. The delay tSU, which is related to the rise time of the LED current from zero to 5A, is measured to be approximately 25μs. This delay is greatly affected by the inherent control loop bandwidth limitation of the fixed frequency LED driver in Figure 2. tSD is also the falling edge of the DIM pulse where the LED current drops to zero, and its value is approximately 2.5μs. This delay is affected by the inductor size of the switching regulator and the forward voltage drop of the LED.

Figure 3: Typical enable dimming waveform for the LED driver in Figure 3 (Vin=10V, IF=0.5A, Fsw=1.6MHz, FDim= 5kHz, DDim=50%).

Figure 4 shows the parallel dimming waveforms of the LED driver in Figure 2. This configuration completely eliminates tD because the driver is in the switching state for a long time. In addition, it can also eliminate tSD because when the switch is set to ON (Shunt_Dim is high), the inductor current IL almost immediately turns to flow from the LED to the shunt switch. On the other hand, the measured tSU is about 10μs, which is still a relatively large delay. In general, at high dimming frequencies, parallel dimming using fixed-frequency LED drivers does not significantly increase the dimming range because the dynamic response of the driver control loop is limited.

Figure 4: Parallel dimming waveforms for the LED driver in Figure 3 (Vin=10V, IF=0.5A, Fsw=1.6MHz, FDim= 20KHz, DDim=50%).

Dimming of Hysteretic Buck LED Driver

A simplified block diagram of a hysteretic buck LED driver is shown in Figure 5, which can be configured for either enable dimming or parallel dimming. The waveforms in Figure 6 are generated by the LM3485 hysteretic buck controller, and these waveforms clearly show that the dimming delay is significantly reduced. The reason for the reduction in tD is that the Enable_Dim control is used to directly enable and turn on the power FET gate driver. The reason for the reduction in tSU is that the hysteretic control method eliminates the dynamic response limitations caused by fixed frequency operation. There is no significant change in tSD.

Figure 5: Simplified block diagram of a hysteretic buck LED driver.

Figure 6: Enable dimming waveform of the hysteretic buck LED driver in Figure 6 (Vin=20V, IF=0.7A, Fsw=750KHz, FDim= 20KHz, DDim=50%).

Figure 7 shows the parallel dimming waveforms of the hysteresis LED driver in Figure 5. These waveforms show that all dimming delays have been significantly reduced, resulting in a wide dimming range at high dimming frequencies. In a small space, parallel dimming with a hysteresis LED driver can indeed achieve a very wide dimming range at high dimming frequencies. However, there is a disadvantage of hysteresis control, that is, the switching frequency of the driver will change greatly with changes in input voltage.

Figure 7: Parallel dimming waveforms for the hysteretic buck LED driver in Figure 6 (Vin=20V, IF=0.7A, Fsw=750KHz, FDim= 20KHz, DDim=50%).

Constant On-Time Buck LED Driver

The fixed on-time buck driver uses a comparator and one-shot on-timer based control architecture and compares the voltage at the feedback pin (FB) with an internal reference voltage. If the FB voltage is lower than the reference voltage, the buck switch is turned on for a time determined by the input voltage and a programming resistor (Ron). After the on-time, the switch remains off for a fixed time or remains off until the FB voltage drops below the reference voltage again. The buck switch is then turned on again for another on-cycle. Because this on-time is programmed, it is inversely proportional to the input voltage to minimize changes in the switching frequency when the line voltage changes.

A simplified block diagram of a fixed on-time buck LED driver is shown in Figure 8, which can be configured for either enable dimming or parallel dimming. The waveforms in Figure 9 are generated by the LM3404 (1A fixed on-time buck regulator). Similar to the hysteretic buck driver, tD is reduced but tSD is not significantly changed. In addition, once Enable_Dim is high, the on-time driver switches multiple times at the maximum duty cycle to ramp the inductor current from zero to IF. This maximum duty cycle is determined by the programmed start-up time at the operating input voltage and the minimum on-time of the driver. Therefore, the tSU delay of the fixed on-time scheme is larger than the tSU generated by the hysteretic scheme to ramp the inductor current from zero to IF in one cycle (Figure 6).

Figure 8: Simplified block diagram of a constant on-time buck LED driver.

As can be seen from the waveforms in Figure 10, the fixed on-time LED driver can significantly reduce all dimming delays. In addition, when the shunt switch is on, since this on-time is fixed, the LED driver is forced to switch at a lower switching frequency to shorten the operating duty cycle. Reducing the switching frequency can reduce switching losses and improve efficiency. In summary, the fixed on-time scheme provides a good compromise between fixed frequency operation and hysteretic control. Using this scheme together with parallel dimming can achieve a wide dimming range at high dimming frequencies.

Conclusion

This article explores the dimming range of high-frequency PWM dimming schemes in three configurations: fixed frequency buck LED driver, hysteresis buck LED driver, and fixed on-time buck LED driver, and verifies the performance of different configurations through experimental data. The verification results show that the parallel dimming scheme using hysteresis buck LED driver has a wide dimming range at high dimming frequency. Fixed on-time LED driver is a good trade-off between fixed frequency operation and hysteresis control. Using this driver for parallel dimming can also achieve a large dimming range at high dimming frequency.