Design of reference source based on DDS chip AD9852

0 Introduction

Direct digital frequency synthesis (DD6) is a technology that uses a fixed and accurate clock source as a reference and uses a digital processing module to generate an output signal with adjustable frequency and phase. With the development of ultra-large-scale integrated circuits and microelectronics technology, modern high-performance, high-integration and small-volume DDS products are rapidly replacing traditional analog signal frequency synthesis technology and becoming a new solution to this type of problem. This article uses FPGA to calculate the corresponding frequency control word and programs the DDS chip AD9852 to finally obtain the required output waveform.

1 System overall design

The reference source is mainly composed of host computer control, FPGA control, DDS, reference source, modulation signal source and waveform output module, as shown in Figure 1. The host computer control unit is connected to the circuit board by a computer through a USB bus for control operation. The FPGA control unit realizes information exchange with the host computer control unit, and sends control words to the DDS chip in parallel to manage its internal registers. The reference source provides a high-precision clock crystal oscillator for DDS to ensure the spectral purity of the DDS output signal. The modulation signal unit provides external modulation information for DDS. The waveform output module is composed of a low-pass filter, an operational amplifier and a resistor network, which mainly completes the filtering and amplification functions of the DDS output signal.

After the system is powered on and reset, the green LED diode on the circuit board flashes to indicate that the whole machine is in normal state. When there is DDS waveform output, the blue LED diode on the circuit board flashes to indicate that it is working normally.

2 System Module Design

2.1 System software design

The host computer control of the reference source is implemented in C language programming, which mainly completes the read and write operations of the internal registers of the FPGA, and then controls the management of various hardware resources on the board. In addition, the calculation of the frequency control word of the DDS is also calculated by the host computer software. The FPGA receives the command from the host computer, writes the control word to the internal register of the DDS after parsing, and completes the corresponding function. At the same time, the FPGA is responsible for various clock management on the circuit board. The overall workflow of the system software is shown in Figure 2.

2.2 Frequency Control Design

This paper uses DDS technology to generate frequency-adjustable waveforms, which have the advantages of high frequency resolution and continuous phase. The basic block diagram of DDS is shown in Figure 3.

The basic structure of DDS includes: phase accumulator, sine lookup table ROM, digital-to-analog converter DAC, etc. DDS has two main disadvantages: one is low output frequency, and the other is many spurious signals in the output spectrum. The low output frequency is mainly limited by the operating frequency of DDS. With the development of microelectronics technology, this defect will gradually be compensated. The spurious signals in the DDS output spectrum are inherent in DDS, which is determined by the working mode of DDS.

The basic working principle of DDS is: the phase accumulator, under the control of the N-bit frequency control word FTW, uses the reference clock frequency fc as the sampling rate to generate a digital linear phase sequence of the signal to be synthesized, and uses its high M bits as the address code to transform through the sine lookup table ROM to generate an L-bit digital sequence S(n) corresponding to the signal waveform, which is then converted into a step analog voltage waveform S(t) by the digital-to-analog converter, and finally smoothed into a continuous sine waveform as output by the low-pass filter LPF with interpolation function. FTW and fc clock frequencies jointly determine the frequency fo of the DDS output signal, and the relationship between them satisfies:

From the above, we can know that DDS technology can be understood as the hardware implementation problem of signal synthesis in digital signal processing, that is, given the signal amplitude, frequency, and phase parameters, the required signal waveform is generated. From the system perspective, it can be considered as a given input clock fc and frequency control word FTW, outputting a corresponding sinusoidal signal. In addition, DDS can also be considered as a variable program fractional divider.

The DDS chip used in this article is the AD9852 chip produced by Analog Device. The clock frequency can reach up to 300MHz, with an internal 12-bit DAC, a 48-bit phase accumulator, and digital modulation functions such as FSK and PSK. AD9852 is a highly integrated DDS chip, which combines a high-speed DAC and a comparator to form a digital programmable synthesizer. When given a precise reference clock source, AD9852 will generate a highly stable sine wave output with programmable frequency, phase and amplitude. The frequency control word of AD9852 reaches 48 bits, so that its frequency resolution can reach 1μHz. Its phase is truncated to 17 bits, which makes AD9852 have an excellent free spurious dynamic range SFDR. AD9852 also provides 14-bit digitally controlled phase modulation. Its structural block diagram is shown in Figure 4.

After the whole machine is powered on and reset, in order to set a certain frequency value, the frequency control word needs to be written in parallel from high to low to address 04h to address 09h of AD9852. The VreilogHDL program code is as follows:

2.3 Amplitude Control Design

AD9852 has a built-in current output DAC. There are two ways to change its output amplitude: 1) The maximum output amplitude of AD9852 is determined by the resistor Rset connected to pin 56. The maximum full-swing output current is 20mA. The relationship between resistor Rset and output current Iout is: Iout=39.9/Rset; 2) Addresses 21h and 22h of AD9852 are amplitude control registers. Changing their control words can change the output signal amplitude.

After the whole machine is powered on and reset, in order to set a certain amplitude value, the amplitude control word needs to be written into the addresses 21h and 22h of AD9852 in parallel from high to low. The VreilogHDL program code is as follows:

2.4 AM Design

Based on the amplitude control design discussed in 2.3, AM modulation can be further realized by adding an external modulation signal, where the block diagram of the generation of the external modulation signal is shown in Figure 5:

In Figure 5, RAM stores the external modulation signal waveform. In this article, a sine wave waveform needs to be stored. The NCO is constructed by RAM and FPGA together. The stored value is calculated by the host computer and written into the RAM through the FPGA. After the data in the RAM is read out by the FPGA, it is amplified by the digital multiplier. The multiplication factor is determined by the amplitude modulation depth of the AM. By writing the waveform data corresponding to the external modulation signal to the address 21h and 22h (amplitude control register) of the AD9852, AM modulation with controllable modulation rate and modulation depth can be realized.

2.5 Waveform output design

The signal generated by AD9852 is directly output by the cosine DAC inside the device. It does not contain a low-pass filter, so its output signal needs to be filtered. In this paper, in order to reduce the interference of the internal system clock of AD9852, a 7th-order elliptic filter with faster falling speed and narrow transition band characteristics is used. As shown in Figure 6.

The amplitude range of the AD9852 output signal is small and needs to be amplified according to the actual application situation. This article uses the operational amplifier LM7171 to build a negative feedback amplifier circuit.

3 Conclusion

This paper introduces the design method of the reference source, which uses DDS technology and has the advantages of high frequency resolution, phase continuity, low phase noise and low spurious. The frequency and amplitude of the reference source are controllable. At the same time, the implementation method of AM is discussed. Compared with the design method of traditional analog methods, it is lighter, smaller, and has good linearity, which is convenient for calibration and batch production. The DDS has been used in a portable signal source. The whole system has been tested to be stable. It has been actually applied in a project of the General Staff, achieving the expected goal and has promotion value.