Characteristics and applications of active matrix LCD power supply chip MAX1664

    Abstract: The active matrix liquid crystal display power core is a switching power supply launched by the American MAXIM company. It has the characteristics of boosting and dual output phase locking. This article introduces the pin functions, internal structure, application circuit and component selection of MAX1664.

    Keywords: active matrix liquid crystal display pulse width modulation phase lock operation backplane driver MAX1664

1 Overview

The MAX1664 integrates the output power supply and backplane driver circuitry for an active-matrix thin-film transistor (TFT) liquid crystal display (LCD). It includes a pulse-width modulated (PWM) boost converter, a dual-output converter with positive and negative voltages. , an LCD backplane power driver, and a phase-locked loop that synchronizes the three outputs to the backplane clock. The MAX1664 is a switching power supply whose high switching frequency (typically 1MHz) and phase-locked operation allow the use of minimal and minimal external components.

MAX1664 has the following features:

●MAX1664 provides two DC-DC (DC-DC1 and DC-DC2) outputs. The output voltage of DC-DC1 is from VIN to 5.5V. DC-DC2 is a dual output of positive and negative voltages. The first output is from VIN to +28V, the second channel is from 0V to -10V (external components can reach -20V); MAX1664 also provides an LCD backplane driver;

●Wide operating voltage, from +2.8V to 5.5V;

●Load current can reach 500mA;

●The phase of the DC-DC converter is locked by the backplane driver clock, so the noise is very low;

●1mA shutdown power supply;

●Three output "ready" (RDY) signals are displayed.

2 MAX1664 pin functions

MAX1664 has 20 pins and is packaged in TSSOP, only 1.1mm thick. Its pin distribution is shown in Figure 1, and the functions of each pin are listed in Table 1.

Table 1 MAX1664 pin functions

3 MAX1664 internal structure

The internal structure block diagram of MAX1664 is shown in Figure 2. It mainly consists of four parts, namely a pulse width modulation (PWM) boost converter (DC-DC1), a dual output (positive and negative voltage) converter (DC-DC2), a backplane power driver, and a user Phase-locked loop with three outputs synchronized to the backplane clock.

3.1 DC-DC1 boost converter

The DC-DC1 uses a current-mode boost pulse-width modulation (PWM) device to generate a positive, adjustable voltage from 3V to 5.5V (not less than VIN). This converter uses an N-channel MOSFET with a maximum on-resistance of 0.5Ω whose switching frequency is phase-locked to the backplane clock. Table 2 describes the possible switching frequency operation of the DC-DC boost converter.

Table 2 Switching frequency operation

3.2 DC-DC2 dual output

The DC-DC2 uses a synchronized and timed PFM device to provide positive and negative voltage outputs. When the switching pulse occurs, its output voltage is synchronized with DC-DC1, which minimizes mutual interference and sub-harmonic effects of the converters. The current of the external inductor of DC-DC2 is always discontinuous, so that the two outputs can be adjusted independently, so that one output has 100% load when the other output has no load.

3.3 Backplane power driver

The MAX1664 provides a low-impedance backplane power driver (see Figure 2). It converts the BPCKL signal (backplane driver clock) from a logic level to BPVDD levels and BPVSS levels. The backplane driver consists of a complementary pair of N-channel and P-channel high-current MOSFETs. When the level of BPCLK is high or low, it will drive BPRV to become BPVDD or BPVSS respectively. The power supply for the backplane driver can be obtained from the output of DC-DC1, namely VOUT1.

3.4 Phase locked loop

There is also a phase-locked loop (PLL) inside the MAX1664, which synchronizes the PWM and PFM converter clocks with the backplane clock, which will minimize noise and interference. The PLL is a device that operates at multiple frequencies. It generates clocks with nominal frequencies of 1MHz and 500kHz for DC-DC1 and DC-DC2 respectively. The PLL is connected to the clocks of IN, REF and GND (see Figure 2) through the pins respectively. This clock is compared with the backplane clock in the phase detector. The resulting signal then enters the VCO (voltage controlled oscillator) and is locked by the VCO output. The clock signal with a nominal frequency of 1.92MHz is obtained, and then divided by 2 and 4 as the clock signals of DC-DC1 and DC-DC2 respectively.

4 Application circuit and component selection

The application circuit of MAX1664 is shown in Figure 3.

4.1 Selection of output voltage

The three output voltages and the DC bias voltage of the backplane clock (the voltage at point A in Figure 3) are all adjustable. Each output voltage can be adjusted using two resistors with an accuracy of 1%. These resistances can be calculated by equations.

a.DC-DC1 output voltage

For VOUT1=5V, typical values ​​R1=100kΩ, R2=301kΩ. In order to get different VOUT1, you can first give VOUT1, select R2=100kΩ, CFB1=50pF, and then calculate the resistor R1. R1 is determined by the following formula:

R1=R2（VOUT1/VFB1-1） (1)

b. Positive voltage output of DC-DC2

For VOUT2+=15V, typical values ​​R8=49.9kΩ and R7=549kΩ. In order to get different VOUT2+, you can first give VOUT2+, select R8=49.9kΩ, and select R7 as follows:

R7=R8 (VOUT2+ (VFB2+)-1) (2)

c.Negative voltage output of DC-DC2

For negative voltage output, the threshold voltage of FB2- is 0V. For VOUT2+=-5V, typical values ​​R5=49.9kΩ, R6=200kΩ. In order to get different VOUT2-, choose R2=49.9kΩ, and R6 is:

R6=R5‖VOUT2-/VREF‖ (3)

d. DC bias voltage VDCBS of the backplane driver

For VDCBS=VBPVDD/2, typical value R3=R4=100kΩ. In order to obtain different values ​​of VDCBS, R3 can be calculated by selecting the value of R4, i.e.

R3=R4[VBPVDD-VBPVSS/VDCBS-VBPVSS]-1 (4)

4.2 Selection of inductor

As shown in Figure 3, the optimal value of inductor L1 is 3.3μH. In order to achieve the highest operating frequency, the DC resistance of L1 should be less than 300Ω. If the value of L1 is larger (such as 4.7μH), the output current capability of DC-DC1 can be increased, but this will be at the expense of increasing the size and adding an output filter capacitor for the stability of the loop. The typical value of inductor L2 is 4.7μH. In the case of larger input voltages (such as 5V) and low switching frequencies (less than 400kHz), increasing the value of L2 (from 6.8μH to 10μH) can be used to flow the peak current. In some cases, reducing the value of L2 can be used to improve the DC-DC2 output current capability. For DC-DC2, the relationship between output voltage, switching frequency, inductance value and load current is a complex relationship and is not linear.

4.3 Increase output VOUT1

In order to increase the VOUT1 output voltage above 5.5V, a compensation pump circuit as shown in Figure 4 should be connected. The circuit connected in the picture will provide an output with a voltage of 10V and a current of 150mA. Other voltages between 2VIN and 10V can be determined by appropriate selection of the values ​​of R1 and R2. C2~C4 are composed of two 3.3μH ceramic capacitors connected in parallel, which can meet the 1.1mm thickness requirement of the chip circuit. If there are no thickness restrictions, a larger capacitance capacitor can be used instead of two parallel capacitors.

4.4 Configuration of 3.3V～-20V charge pump

For applications that require a negative voltage of -20V, a reverse charge pump circuit can be added to the VOUT2- output terminal, as shown in Figure 5. Typical values ​​for CF are between 0.47µF and 1µF and for COUT between 4.7µF and 10µF. As a general guideline, COUT is 10 times CF.

Finally, it should be pointed out that MAX1664 is a high-power switching power supply, so special attention should be paid to the connection of the power supply circuit and the connection of the bypass capacitor. The wiring of the circuit board should be done carefully. The bypass terminal IN and INP are isolated with a 33Ω resistor (see R9 in Figure 3). In addition, the power components should be shielded, and the wiring of the ground point should be carefully handled, otherwise the stability of each output will be affected. Diodes D1~D3 in Figure 3 should use high-speed Schottky diodes.