Hot-swap protection circuit design and examples

introduction

High-availability systems such as servers, network switches, redundant arrays of disk drives (RAID), and other forms of communications infrastructure require near-zero downtime throughout their lifecycle. If a component of such a system fails or needs to be upgraded, it must be replaced without disrupting the rest of the system. The failed board or module is removed and the replacement inserted while the system remains operational. This process is called hot swapping (also called hot plugging1 when the module interacts with system software). To achieve safe hot swapping, connectors with staggered pins are often used to ensure that ground and power are established before other connections. In addition, each printed circuit board ( PCB ) or hot-swap module is equipped with a hot-swap controller2 to facilitate safe removal and insertion of the module from a live backplane. The controller also provides continuous short-circuit protection and overcurrent protection when in operation.

Although the current cut off or turned on will be relatively large, some subtleties of high current design are often not fully considered. "Details determine success or failure", this article will focus on analyzing the functions and importance of each component in the hot swap control circuit, and deeply analyze the design considerations and device selection criteria when using ADI's ADM11773 hot swap controller in the design process.

Hot Swap Technology

Two common system supply voltages are -48 V and +12 V, which use different hot-swap protection configurations. The -48 V system contains a low-side hot-swap controller and a pass MOSFET, while the +12 V system uses a high-side hot-swap controller and a pass MOSFET.

The -48 V solution is derived from traditional communication switching system technology, such as Advanced Communications Computing Architecture (ATCA) systems, optical networks , base stations, and blade servers. The 48 V power supply can usually be provided by a battery pack. The 48 V is selected because the power and signal can be transmitted to a longer distance without suffering a lot of loss; in addition, under normal conditions, the level is not high enough, so there is no serious electrical shock risk. The reason for using negative voltage is that when the equipment is inevitably exposed to a humid environment, the metal ion migration from the anode to the cathode is less corrosive when the positive terminal is grounded.

However, in data communication systems, where distance is not an important factor, +12 V makes more sense and is commonly used in servers and network systems. This article will focus on +12 V systems.

Hot plug events

Consider a system with a 12 V backplane and a set of removable modules. Each module must be removed and replaced without affecting the normal operation of any adjacent modules. Without a controller, each module can present a large load capacitance to the power line, typically in the order of millifarads. When a module is first inserted, its uncharged capacitance requires all the available current to charge it. If this inrush current is not limited, this large initial current will reduce the terminal voltage, causing a large voltage drop on the main backplane, resetting multiple adjacent modules in the system and damaging the module's connector.

This problem can be solved by hot-swap controllers (Figure 1), which can properly control the inrush current and ensure a safe power-up interval. After power-up, the hot-swap controller can also continuously monitor the supply current to avoid short circuits and overcurrent during normal operation.

Figure 1 Hot-swap application block diagram

Hot Swap Controller

The ADM1177 hot-swap controller consists of three main components (Figure 2): an N-channel MOSFET that serves as the main switch for power control, a sense resistor to measure the current, and a hot-swap controller. The hot-swap controller implements the loop that controls the MOSFET conduction current and includes a current-sense amplifier.

Figure 2. ADM1177 functional block diagram

The current sense amplifier inside the hot-swap controller monitors the voltage drop across an external sense resistor. This small voltage (typically 0 to 100 mV) must be amplified to a usable level. The amplifier in the ADM1177 has a gain of 10, so, for example, a 100 mV voltage drop produced by a given current will be amplified to 1 V. This voltage is compared to a fixed or variable reference voltage. If a 1-V reference is used, a current that produces a voltage above 100 mV (±3%) across the sense resistor will cause the comparator to indicate an overcurrent. Therefore, the maximum current trip point depends primarily on the sense resistor, the amplifier gain, and the reference voltage; the sense resistor value determines the maximum current. A timer circuit is used to set the duration of the overcurrent.

The ADM1177 has a soft-start feature where the overcurrent reference voltage ramps up linearly rather than abruptly, causing the load current to follow in a similar manner. This is accomplished by injecting current from an internal current source into an external capacitor (SS pin), causing the comparator reference input to ramp up linearly from 0 V to 1 V. The external SS capacitor determines the rate of ramp up. If desired, the SS pin can also be driven directly with a voltage to set the maximum current limit.

The turn-on circuit consisting of a comparator and reference circuit is used to enable the device. It accurately sets the supply voltage that must be reached to enable the controller. Once the device is enabled, the gate starts charging, and the gate voltage of the N-channel MOSFET used in this circuit must be higher than the source. To achieve this condition over the entire supply voltage (VCC) range, the hot-swap controller integrates a charge pump that can maintain the voltage at the GATE pin 10 V above VCC. The GATE pin requires a charge pump pull-up current to enable the MOSFET and a pull-down current to disable the MOSFET when necessary. The weaker pull-down current is used for regulation, and the stronger pull-down current is used to quickly disable the MOSFET in a short-circuit condition.

The last basic block of a hot-swap controller is a timer, which limits the time the current is regulated during an overcurrent condition. The MOSFET is selected to withstand a certain amount of power for a specified maximum time . MOSFET manufacturers plot this range, or safe operating area (SOA), using a graph like the one in Figure 3.

Figure 3 MOSFET SOA graph

The SOA graph shows the relationship between the drain-source voltage, the drain current, and the duration that the MOSFET can withstand this power dissipation. For example, the MOSFET in Figure 3 can withstand 1 ms at 10 V and 85 A (850 W), and if this condition persists for longer, the MOSFET may be damaged. The timer circuit uses an external timer capacitor to limit the time the MOSFET is subjected to these worst-case conditions. For example, if the timer is set to 1 ms, when the current lasts longer than the 1 ms limit, the circuit will pause and turn off the MOSFET.

To provide a safety margin, the current sense voltage activation threshold of the timer is set to 92 mV in the ADM1177, so the hot swap controller starts timing when the sense voltage approaches the nominal value of 100 mV.

Design Examples

Because controllers such as the ADM1177 are designed to allow for some flexibility, it is useful to demonstrate their use in a 12 V hot swap design example. In this example, it is assumed that:

The controller is ADM1177

V = 12 V (±10%)

VMAX = 13.2 V

ITRIP = 30 A

CLOAD = 2000 μF

VON = 10 V (a good supply level to turn on the controller)

IPOWERUP = 1 A (DC bias current required during power-up)

To simplify the discussion, the effects of device tolerances are not considered in the calculations. Of course, these tolerances should be considered in a worst-case design.

ON Pin

First consider the case where the controller is enabled with the supply voltage exceeding 10 V. If the threshold of the ON pin is 1.3 V, the voltage divider from VIN to the ON pin should be set to a ratio of 0.13:1. To ensure accuracy, the resistor selection should take into account the leakage of the pin.

The voltage divider ratio of the resistor divider consisting of 10 kΩ and 1.5 kΩ is 0.130.

Selection of Sense Resistor

The selection of the sense resistor should be based on the load current required to start the timer.

Where VSENSETIMER = 92 mV.

The maximum power dissipated by the sense resistor at 30 A is

Therefore, the sense resistor should be able to handle 3 W of power. If a single resistor with the appropriate power rating or resistance value is not available, multiple resistors can be connected in parallel to form the sense resistor.

Load capacitance charging time

Before selecting a MOSFET, you must determine the time required to charge the load capacitor. During the power-up phase, the controller will usually reach the current limit due to the inrush current effect of the load capacitor. If the time set by the TIMER pin is not enough to allow the load capacitor to complete charging, the MOSFET will be disabled and the system will not power up. We can use the following formula to determine the ideal charging time:

Where VREGMIN = 97 mV is the minimum regulation voltage of the hot swap controller.

This formula assumes that the load current rises from 0 A to 30 A instantaneously, which is an ideal situation. In reality, the gate charge QGS of a larger MOSFET limits the slew rate of the gate voltage, thereby limiting the power-up current, so a certain amount of charge is transferred to the load capacitor without triggering the timer function. In Figure 4, the MOSFET with a larger QGS causes the timer to operate for a shorter time than the MOSFET with a smaller QGS, from T1 to T3 for the former and from T0 to T2 for the latter.

Figure 4. Effect of QGS during startup

This is because the increase in charge transferred between T0 and T1 is less than the current limit, so the actual time is less than the calculated time. This value is difficult to quantify, it depends on the controller gate current and the gate charge and capacitance of the MOSFET. In some cases, it can account for 30% of the total charging current, so it needs to be considered in the design, especially when using large MOSFETs and high current designs.

In designs utilizing MOSFETs with small gate charge, it can be assumed that the gate voltage rises very quickly. This can result in a fast increase from 0 A to ITRIP, causing undesirable transients, and in this case, soft start should be used.

Soft Start

With soft start, the inrush current can be increased linearly from zero to full scale during the period set by the soft start capacitor. By gradually increasing the reference current, the inrush current can be prevented from suddenly reaching the 30 A limit. It should be noted that during the soft start process, the current is in the process of regulation, so the timer enters the working state from the beginning of the soft start, as shown in Figure 5.

Figure 5 Effect of soft start on timer

Therefore, it is recommended to set the soft start time to no more than 10%~20% of the total time of the timer. For example, a time of 100 μs can be selected. The soft start capacitor can be determined by the following formula:

where ISS = 10 μA and VSS = 1 V.

MOSFET and timer selection

The first step in selecting the right MOSFET is to choose the VDS and ID criteria. For a 12 V system, VDS should be 30 V or 40 V to handle transients that could damage the MOSFET. The ID of the MOSFET should be much larger than the required maximum value (refer to the SOA graph in Figure 3). In high current applications, one of the most important specifications is the MOSFET's on-resistance, RDSON. A small RDSON ensures that the MOSFET has minimal power dissipation during normal operation and generates minimal heat under full load conditions.

Heat and power consumption considerations

Because overheating must be avoided, the power dissipation of the MOSFET under DC load conditions should be considered before considering SOA specifications and timer selection. As the temperature of the MOSFET increases, the power rating will be reduced or derated. In addition, the service life of the MOSFET will be shortened when operating at high temperatures.

As mentioned earlier, the hot-swap controller will start the timer at a minimum detection voltage of 92 mV. To perform the calculation, we need to know the maximum allowed DC current that will not trigger the timer. Assuming the worst-case VREGMIN is 97 mV, then,

Assuming the MOSFET's maximum RDSON is 2 mΩ, the power is

The data sheet will give the thermal resistance of the MOSFET at room temperature. The package size and the attached copper leads will have a certain impact on it. Assume

Since the MOSFET needs to dissipate 2.1W of power, the temperature may rise to 126°C above room temperature under the worst-case conditions:

One way to reduce this value is to use two or more MOSFETs in parallel, which effectively reduces RDSON and, therefore, the power dissipation in the MOSFETs. When two MOSFETs are used, assuming that the current is evenly matched between the devices (allowing for some tolerance), the maximum temperature rise for each MOSFET is 32°C. The following equation gives the power dissipation in each MOSFET:

Assuming room temperature TA = 30°C, adding this temperature rise, the maximum temperature of each MOSFET is 62°C.

MOSFET SOA Considerations

The next step is to examine the SOA graph to select the appropriate MOSFET that will operate under the worst-case conditions. Under the worst-case condition of a short circuit to ground, it can be assumed that VDS is equal to VMAX, which is 13.2V, which is the maximum voltage that can be generated across the MOSFET when the MOSFET source is pulled to ground. During the regulation phase, the worst-case condition will be determined by the maximum value of the hot swap controller regulation point in the data sheet, which is 103 mV. The current can then be calculated as follows:

Before comparing with the MOSFET SOA graph, we need to consider the temperature derating of the MOSFET, since the SOA is based on data at room temperature (TC = 25°C). First calculate the power dissipation at TC = 25°C:

RthJC can be obtained from the MOSFET data sheet.

Now do the same calculation for TC = 62°C:

Therefore, a derating factor of 1.42 can be calculated as follows:

This needs to be applied to the MOSFET SOA graph in Figure 3. To reflect the adjusted power rating, the diagonal line representing the time when the maximum power is applied needs to be shifted downward. Let's first use the 1 ms line to illustrate the principle of this curve. For example, take a point on this line, such as (20 A, 40 V), the power at this point is 800 W, and apply the derating formula:

At 40 V, the derated power corresponds to a current of 14 A, which will determine the new 62°C derated 1 ms line on the SOA plot. The same approach can be used to determine the new 10 ms and 100 μs lines. The new lines are shown in red in Figure 6.

Figure 6. SOA with 62°C derating power limit

Selecting the timer capacitor

The new derating lines in the SOA can be used to recalculate the timer parameter values. Draw a horizontal line along IMAX ≈ 35A and a vertical line along VMAX = 13.2 V (the light blue line), and determine where they intersect the red line. These intersections show a time somewhere between 1 ms and 10 ms, perhaps 2 ms. It is generally difficult to get exact values ​​within the small range of a logarithmic plot, so careful choices should be made, taking into account the impact of these choices on performance and other criteria such as price, to ensure that sufficient tolerance is left.

As mentioned earlier, the time to charge the load is approximately 850 μs. Since the soft-start time is determined by a linear ramp, it takes longer to charge the load capacitance than a step change. To estimate the total charge, assume that half the soft-start time needs to be added to the calculated time if soft-start is used. Thus, half the soft-start time (50 μs) is added to 850 μs, resulting in a total time of approximately 900 μs. If the selected MOSFET has a larger gate charge (e.g. ≥80 nC), as mentioned earlier, this time needs to be further reduced. If the time to charge the load is less than the maximum SOA time, the MOSFET is suitable. In this example, the MOSFET meets the standard (0.9 ms < 2 ms).

A timer value less than 2 ms is sufficient to protect the MOSFET, and greater than 0.9 ms is sufficient to charge the load. If a constant time of 1 ms is chosen, the capacitance can be calculated as follows:

Where ITIMER = 60 μA and VTIMER = 1.3 V,

The calculation for the timer does not change when using parallel MOSFETs. It is important to design the timer and short circuit protection using a single MOSFET because the VGSTH can vary significantly across a group of MOSFETs, so a single MOSFET will be needed to handle the larger current during regulation.

Complete hot-swap design

Figure 7 shows a parallel MOSFET hot-swap design with the correct parameter values. The ADM1177 hot-swap controller can also perform other functions. It integrates an on-chip ADC that can be used to convert the supply voltage and load current into digital data for reading out through the I2C bus , providing a fully integrated current and voltage sensing function.

Figure 7. Complete reference design