1. Introduction
A/D or V/F conversion technology is commonly used to process the measured analog signals at the measurement and control site. The two methods have their own characteristics: A/D conversion technology is generally used in situations where the measured signal rate is high but the interference is not too serious, while V/F conversion technology is often used in situations where the interference is serious and the signal transmission distance is long because it has strong anti-interference and is easy to achieve remote transmission and isolation of signals. However, due to the low sampling rate of V/F conversion, when the requirements for resolution, sampling rate and anti-interference are high, it is often difficult to meet the sampling requirements using V/F conversion technology. Although the sampling rate of A/D conversion is high, its anti-interference is poor, which affects the reliability, stability and test accuracy of the system, and sometimes even fails to work properly.
This paper proposes a new design method for high-performance analog-to-digital converter using PWM technology. By using the internal timer of the MCU and combining it with the improved successive approximation bisection trial algorithm, a high-resolution A/D converter can be designed using only ordinary components to achieve the measurement of analog voltage. Experiments have shown that the design can achieve high accuracy and resolution, with a simple, reliable, low-cost circuit, few transmission signal lines, easy remote transmission or isolation, strong anti-interference ability, and good application value.
2. Working principle of A/D conversion and interface circuit design based on PWM technology
Generally, analog-to-digital conversion includes four processes: sampling, holding, quantization, and encoding. Sampling is the process of converting a continuously changing signal x(t) into a discrete sampling signal x(n) in time. Usually, the width of the sampling pulse tw is very short, so the sampling output is a discontinuous narrow pulse. To digitize a sampled output signal, it is necessary to hold the instantaneous analog signal obtained by the sampled output for a period of time. This is the holding process. Quantization is the process of converting a continuous amplitude sampled signal into a digital signal with discrete time and discrete amplitude. The main problem of quantization is the quantization error. Encoding is the process of encoding the quantized signal into a binary code output. Some of these processes are combined. For example, sampling and holding are completed using a circuit connection, and quantization and encoding are also implemented simultaneously in the conversion process, and the time used is part of the holding time [1].
PWM stands for pulse width modulation. The PWM signal is a digital signal with a fixed period (T) and a variable duty cycle. After integration or low-pass filtering, an analog voltage proportional to its pulse width can be obtained. This voltage is used as a test value to compare with the analog quantity to be measured to obtain the PWM value or digital quantity corresponding to the analog quantity to be measured. This design uses a timer to generate a PWM pulse output signal, uses a comparator as a test result status flag, and adopts an improved successive approximation test algorithm to achieve A/D conversion of the analog quantity to be measured. Since a general single-chip microcomputer has a timer inside, the on-chip timer can be directly used to generate a PWM signal [2]. This design uses the MSP430 single-chip microcomputer. Since its internal timer A has a compare/capture function and has multiple capture/comparators: CCR0--CCRn, this function can be used to more conveniently generate a PWM signal, thereby achieving A/D conversion. The generation of the PWM waveform is based on the "reset/set" mode in the output mode of timer A. For example, the capture/comparator CCR0 can be used to control the PWM period, and the CCR1 channel can be used to control the PWM duty cycle, so that the PWM signal can be easily obtained, as shown in the "reset/set" mode output schematic diagram in Figure 1.
As shown in Figure 1, the pulse width and pulse period of the output waveform can be changed by simply changing the values of CCR1 and CCR0. For example, when the CCR0 signal is used as the pulse period control, the pulse width or duty cycle of the PWM signal can be changed when the value of CCR1 changes. The output signal is a PWM signal, as shown in Figure 2 [3].
If the duty cycle of the PWM signal changes with time, the output signal after low-pass filtering will be an analog signal with a changing amplitude. Therefore, by controlling the duty cycle of the PWM signal, different analog signals can be generated. In this design, CCR0 of timer A of the MSP430 microcontroller is used to control the period, and CCR1 is used to control the duty cycle, thereby generating the required PWM signal.
The A/D conversion circuit design using PWM technology is shown in Figures 3 and 4. The PWM signal generated by the internal timer A of the MSP430 microcontroller is output through the P23 port, and the corresponding analog signal is obtained after two-stage RC low-pass filtering. Then, after impedance transformation through the voltage follower composed of the operational amplifier, it is sent to one end of the voltage comparator LM393 as a test value, and the analog quantity to be measured is connected to the other end of the comparator. The two signals are compared in the comparator. The size of the test value can be reflected by detecting the output level state of the comparator. The duty cycle of the PWM signal is adjusted by the output state of the comparator to generate the output of the next PWM signal. Therefore, by continuously testing and correcting the duty cycle of the PWM signal, the test value can be close to or equal to the measured value. The pulse value at this time is the A/D conversion value of the measured value, which can achieve 16-bit conversion accuracy. In addition, it can be seen from the schematic diagram 4 that since the entire circuit is relatively simple and the converter is connected to the system by only two signal lines: the PWM signal input line and the comparator signal output line for comparing the probe value with the measured analog value, it is easy to achieve anti-interference isolation, which is much more troublesome when performing anti-interference isolation in a circuit using an ordinary A/D converter.
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3. Selection of microcontroller MCU
For the convenience of use and operation, this design should not only be simple in design but also have low power consumption. Therefore, after comprehensive and comparative analysis of many aspects, it was decided to use TI's MSP430 series MCU with SOC characteristics. This is an ultra-low power 16-bit mixed-signal controller that integrates a large number of peripheral modules and temperature sensors. It is particularly suitable for battery-powered handheld devices or test instruments that need to compensate for ambient temperature.
The MSP430 microcontroller uses the latest low-power technology, operates at a voltage of 1.8 to 3.6V, has a normal operating mode (AM) and 4 low-power operating modes; in the minimum power mode, its operating current is only 0.1μA, and it can be easily switched between various operating modes. Its ultra-low power consumption is particularly prominent in practical applications, especially in battery-powered portable devices. After the system is initialized, it enters the standby mode. When there is an allowed interrupt request, the CPU will be awakened within 6μs, enter the active mode, and execute the interrupt service program. After the execution is completed, after the RETI instruction, the system returns to the state before the interrupt and continues the low-power mode.
The MSP430F1232 microcontroller used in this design has a very high integration level. In addition to the internal timer with PWM function, the chip also integrates 10-channel 10-bit A/D conversion, temperature sensor, USART, watchdog timer, on-chip digital control oscillator DCO, a large number of I/O ports with interrupt function, large-capacity on-chip Flash and RAM, and information Flash memory [4]. The 16-bit timer A has 3 capture/compare channels, and the internal Flash memory can realize power-off protection and software upgrade. Therefore, the use of MSP430 microcontroller as the processor of this design can not only simplify the system circuit design, shorten the development cycle, and reduce the system power consumption, but also use its internal integrated temperature sensor to conveniently perform temperature compensation on the analog quantity being measured, thereby improving the test accuracy of the system.
4. A/D conversion resolution analysis and main program design
Since the resolution of the A/D converter using PWM technology depends on the count value or word length of the timer that controls the PWM pulse duty cycle, the resolution of the A/D conversion can be changed by changing the count value of the timer. The word length of the counter in the internal timer A of the MSP430 microcontroller is 16 bits, so the adjustment range of its PWM signal duty cycle is 0 to 216-1. Therefore, when the word length of the counter of the system timer is 16 bits, the maximum resolution of the A/D converter using PWM technology can reach 16 bits. Since the 16-bit timer inside the microcontroller uses a crystal oscillator as the working clock of the internal counter, its timing accuracy is generally high, and its count value is strictly linear with the PWM pulse duty cycle. The input pulse is accurate, so the linearity and accuracy of the A/D conversion are good, and the linearity error is less than 1%. The conversion rate is related to the resolution and the period of the selected PWM signal. The higher the resolution, the longer the conversion time, but compared with the V/F method, the conversion speed is much faster.
In order to shorten the trial time and improve the sampling speed at high resolution, the improved successive approximation split trial method is adopted so that the trial value can quickly approach the measured analog quantity. The conventional split trial method is that at the beginning of each trial, half of the maximum count value (i.e., the word length split value) is first used as the trial initial value and converted into a PWM signal output, which is equivalent to outputting a PWM pulse signal with a 1:1 duty cycle, and then the state of the comparator is tested to determine the size of the current trial value. If the trial value is less than the measured analog quantity, the current trial value is retained, otherwise it is removed, and then half of the remaining value (i.e., the remaining split value) is used as a new increment to add to the last retained value to generate a new trial value and convert it into a PWM pulse signal output, and then the state of the comparator is tested. If it is greater than the measured analog quantity, the current increment is removed, otherwise it is retained. Each subsequent output uses the remaining split value as an increment for trial, and the trial continues until the number of trials equivalent to the resolution is completed. For example, 16 trials are required to achieve A/D conversion with 16-bit resolution. Since this method has the same number of trials for each sampling no matter how close the current sampling value is to the measured value, in order to reduce the number of trials and increase the sampling rate, an improved successive approximation trial algorithm is used in this design, which can greatly reduce the number of trials. The specific implementation method is: after the first trial is completed and the sampling value is obtained, the current sampling value is retained, and the remaining split value is no longer used as the new increment, but the minimum value is used as the initial increment (that is, the lowest position is 1, which can be regarded as a weight), added to the last retained value and converted into a PWM signal output, and the current increment value is determined by testing the comparator output. If the trial value is less than the measured analog value, the current trial value is retained, otherwise it is removed. If the trial value needs to be increased, the weight can be shifted left by one position and then added to the last trial value to form a new trial value, so that the successive approximation trial value is always in a tracking trial state, thereby greatly reducing the number of trials. Since in the actual test process, the analog quantity being measured generally rarely undergoes sudden changes and is mostly in a state of slow increase or slow decrease, the use of this improved successive approximation heuristic algorithm will effectively increase the sampling rate of the A/D converter.
The main program of the A/D converter using PWM technology is written in assembly language. The main program flow chart is shown in Figure 5:
5. Conclusion
A high-resolution A/D converter is designed using common components and the internal timer of the MCU combined with PWM technology. To change the resolution of the A/D conversion, it is only necessary to modify the relevant parameters of the PWM timer. It is flexible and convenient, with good stability and high linearity. Since the converter is connected to the system with only two signal lines, it is very convenient to use optoelectronic isolation technology to improve the anti-interference ability of the system. In addition, due to the low-pass filtering link in the circuit, the circuit itself also has a certain anti-interference ability, which is more suitable for use in an environment with strong interference. The improved successive approximation trial algorithm is used to realize the measurement of analog voltage or A/D conversion, which improves the sampling rate. The conversion circuit design and algorithm implementation are simple, the test resolution and accuracy are high, and it has good application value.
The innovation of this paper is to use PWM technology to measure analog voltage or A/D conversion, which has high resolution, good anti-interference and is easy to use photoelectric isolation. At the same time, the improved successive approximation trial algorithm greatly reduces the number of trials, the design of the conversion circuit and the conversion algorithm are simple, and the A/D conversion resolution can be set arbitrarily according to needs, which has good application value.
At present, the sales price of 14-16-bit A/D converter chips on the market is about 100 yuan to 300 yuan, and the sales price of V/F conversion modules with corresponding resolution is about 100-150 yuan. The main chips or components used in the A/D converter designed with PWM technology are: operational amplifier: 8 yuan; high-speed comparator LM311 or LM393: 2 yuan; MCU: 15 yuan (but MCU must be used when using A/D converter chips, and this cost can be saved when using the MCU in the user system), that is: the total cost including MCU does not exceed 30 yuan. According to conservative calculations: if the annual demand for A/D chips plus V/F conversion modules is 100,000 pieces (blocks), the economic benefits are quite considerable.
References:
[1] Wang Shuhong. Analysis of Several A/D Conversion Technologies and Performance Characteristics [J]. Shanxi Electronic Technology, No. 5, 2004
[2] Zhang Yunbo. Software implementation method of PWM signal [J]. Microcomputer Information, 2002, 18-10: 46-47.
[3] Qin Long. MSP430 MCU C language application design example [M]. Electronic Industry Press, 2006.5
[4] Wei Xiaolong. MSP430 series microcontroller interface technology and system design examples [M]. Beijing University of Aeronautics and Astronautics Press, 2003.6
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