Setting of working mode and feedback theory analysis of single chip switching power supply

Abstract: First, the setting methods of continuous mode and discontinuous mode of monolithic switching power supply are introduced. Then, taking the basic feedback circuit of TOPSwitch as an example, the feedback theory of these two working modes is deeply analyzed.
Keywords: monolithic switching power supply; continuous mode; discontinuous mode; setting

There are two basic working modes for monolithic switching power supplies, one is continuous transmission mode (referred to as continuous mode); the other is discontinuous transmission mode (referred to as discontinuous mode). The following first introduces the setting method of the two working modes and the power consumption comparison, and then explains the feedback theory of the two working modes.

1 Setting of two working modes of monolithic switching power supply
1.1 Characteristics of continuous mode and discontinuous mode
The characteristic of continuous mode is that the high-frequency transformer starts from a non-zero energy storage state in each switching cycle. The characteristic of discontinuous mode is that the energy stored in the high-frequency transformer must be completely released in each switching cycle. The difference between the two can be seen from the switching current waveform shown in Figure 1. The switching current in continuous mode starts from a certain amplitude, rises to the peak along the slope, and then quickly returns to zero. At this time, the proportional coefficient KRP of the primary pulsating current (IR) and the peak current (IP) is <1.0, that is

In the formula, IPRI is the primary current, which includes the peak current IP and the pulsating current IR. II is the initial value of the primary current. UDS(ON) is the drain-source conduction voltage of the MOSFET, and tON is the conduction time. Since VD is cut off, the primary is isolated from the output load, so the energy originally stored in C2 supplies power to the load and maintains the output voltage unchanged. At this time, the energy is stored in the high-frequency transformer in the form of magnetic field energy.
During the TOPSwitch shutdown period, the magnetic flux in the high-frequency transformer begins to decrease, and the polarity of the induced voltage of the secondary winding changes, causing VD to conduct due to forward bias. The energy stored in the high-frequency transformer is transferred to the output circuit, supplying power to RL on the one hand and recharging C2 on the other hand. The secondary current decays from the initial value according to the following formula:

In the formula, IS is the secondary current, and IPNP/NS is the initial value of the secondary current. IP is the peak value of the primary current before the TOPSwitch conduction ends. UF1 is the forward conduction voltage drop of the output rectifier tube VD. tOFF is the turn-off time of TOPSwitch. During the turn-off period of TOPSwitch, if the secondary current IS decays to zero, the output current is provided by C2.
TOPSwitch has two working modes, which depends on the last IS value during the turn-off period. If IS decays to zero during the turn-off period, it works in discontinuous mode. If the decay result of IS is still greater than zero, it works in continuous mode.
2.2 Feedback principle of two working modes in actual situations
Ideally, the influence of parasitic elements (distributed capacitance and leakage inductance) in the feedback circuit is not considered. However, in actual situations, the influence of distributed capacitance and leakage inductance must be considered, so there are peak voltages and peak currents in the working waveform.
1) Feedback principle of actual discontinuous mode
The actual discontinuous mode working waveform and simplified circuit principle are shown in Figure 3. As shown in Figure 3 (b), each switching cycle is divided into three stages in the discontinuous mode. In addition, there are three parasitic elements in the actual circuit: leakage inductance LP0 of the primary winding, leakage inductance LS0 of the secondary winding, and distributed capacitance CD. Among them, CD is the sum of TOPSwitch's output capacitance COSS and the distributed capacitance CXT of the high-frequency transformer's primary winding, that is, CD=COSS+CXT. The following specifically discusses the impact of these parasitic components on the circuit.

In stage 1, as TOPSwitch turns on, CD discharges. The energy ED stored in CD at the end of the previous cycle is released at the beginning. Because ED is proportional to UCD2, the power efficiency will be significantly reduced when the capacity of CD is large, especially when UI is high. It should be noted that in stage 1, the influence of leakage inductance can be ignored because the high-frequency transformer is storing energy and the current in the secondary winding is zero.
In stage 2, TOPSwitch turns off. The energy stored in the high-frequency transformer in the previous stage is transferred to the secondary winding. At this time, the leakage inductance LP0 and LS0 both try to hinder the change of current. Specifically, LP0 tries to hinder the decrease of the primary current IPRI, while LS0 tries to hinder the increase of the secondary current IS. Therefore, in the process of IPRI decreasing and IS increasing, a "crossover zone" is formed. The final result is that IPRI decreases to zero along the slope, and its slope is determined by the leakage inductance LP0 and the primary voltage; IS rises along the slope to the peak ISP, and the slope is determined by the leakage inductance LS0 and the secondary voltage. The key issue is that the primary current must remain continuous in the crossover zone. When the attenuated primary current flows through CD, CD is charged to UP. This peak voltage generated by the leakage inductance LP0 is superimposed on the waveform of UDS, forming a leakage inductance spike voltage, also known as a drain-source peak pulse. There is a relationship
UDS=UI＋UOR＋UP (8) .
In the actual circuit, the clamping protection circuit can be used to clamp UDS below the drain-source breakdown voltage rating of TOPSwitch (700V or 350V, depending on the chip) to avoid damage to the chip due to the increase of UDS due to UP.
In stage 3, the induced voltage UOR drops to zero. The high-frequency transformer has released all the energy stored in stage 1, reducing the drain-source voltage from UDS=UI＋UOR at the end of stage 2 to UDS≈UI. However, since this voltage change generates an attenuated oscillation waveform by exciting the resonant circuit composed of stray capacitance and primary inductance, and superimposed on the UDS waveform, it will not stop until TOPSwitch is turned on again, so the UDS waveform in stage 3 has troughs and peaks. Obviously, this decaying oscillation waveform has a "modulation" effect on the voltage and energy on CD, and determines the power loss of the conversion at the beginning of the next switching cycle.
2) Feedback principle of actual continuous mode
The feedback circuit of the actual continuous mode also has the same parasitic elements as the discontinuous mode, and the actual characteristics of the output circuit must also be considered. An ideal rectifier should have no forward conduction voltage drop and reverse recovery time. The reverse recovery time of the junction rectifier is caused by the minority carriers passing through the diode junction, while the reverse recovery time of the Schottky diode is caused by the junction capacitance. For monolithic switching power supplies, it is recommended to use Schottky diodes with extremely short reverse recovery time or ultra-fast recovery diodes as output rectifiers. Ordinary low-speed rectifiers must not be used, because the latter not only increases high-frequency losses and reduces efficiency, but also causes thermal breakdown of the rectifier.
The operating waveform of the actual continuous mode is shown in Figure 4. In stage 1, when TOPSwitch starts to turn on, there is still current passing through the secondary, which means that at the moment of turn-on, UDS=UI+UOR, not UDS=0. As a result, the power consumption of TOPSwitch during turn-on is higher than that of discontinuous mode. This is because additional energy is stored in the distributed capacitor CD. In addition, before the secondary winding output is turned off, the secondary leakage inductance LS0 must be charged, resulting in a current crossover phenomenon in the process of IS increasing and IPRI decreasing. Once LS0 is charged, the output rectifier is reverse biased and cut off, causing the secondary current IS to become zero, and this change in IS is sensed to the primary winding, resulting in a reverse recovery current peak (spike current) at the leading edge of the primary current waveform. This spike current causes the primary current to increase suddenly and instantly, which can easily cause the internal overcurrent protection circuit to malfunction. For this reason, a leading edge latch circuit is specially designed inside TOPSwitch. Its function is to block the rising edge of the overcurrent comparator output for 180ns when TOPSwitch is just turned on, so as to avoid the spike current and prevent false triggering.

During the shutdown period of TOPSwitch, there is no phase 3, only phase 2. At the moment of shutdown, affected by the leakage inductance LP0 and LS0, the primary current and the secondary current will also form a crossover area, which causes UDS to rise to (UI + UOR). However, unlike the discontinuous mode, the induced voltage UOR will exist until TOPSwitch turns on again, so there is no time interval after UOR drops to zero (i.e. phase 3).

The switching current in the discontinuous mode rises from zero to the peak value and then drops rapidly to zero. At this time, KRP=1.0, that is,
IP=IP (2)
1.2 Setting the working mode
The proportional relationship between IR and IP, that is, the value of KRP, can be used to quantitatively describe the working mode of the single-chip switching power supply. The value range of KRP is 0~1.0. If IR=IP, that is, KRP=1.0, the switching power supply is set to the discontinuous mode. When IR 1) When 0 2) Ideally, IR=0, KRP=0, indicating that it is in the absolute continuous mode, or called the extreme continuous mode. At this time, the primary inductance LP→∞, and the primary switch current is a rectangular wave.
In fact, there is no strict boundary between the continuous mode and the discontinuous mode, but there is a transition process. For a given AC input voltage range, a smaller KRP value means a more continuous operating mode and a relatively large primary inductance, and the primary IP and IRMS are small. At this time, a smaller power TOPSwitch chip and a larger high-frequency transformer can be selected to achieve an optimized design. Conversely, a larger KRP value means a poorer degree of continuity, a smaller primary inductance, and larger IP and IRMS. At this time, a larger power TOPSwitch chip must be used with a smaller high-frequency transformer.
In summary, the operating mode of the switching power supply can be set by selecting the KRP value. The setting process is: continuous mode. For AC voltages with a wide input range of 85 to 265V or a fixed input of 230V, it is more appropriate to select KRP=0.6~1.0.
1.3 Comparison of power consumption in two operating modes
The following are two design examples that can illustrate the changes in IP and IRMS values ​​corresponding to KRP=1.0 (discontinuous mode) and KRP=0.4 (continuous mode) when the input range is wide. This allows the comparison of the TOPSwitch power loss in the two operating modes.
1) Design example of discontinuous mode
The working parameters are known: KRP=1.0, UImin=90V, Dmax=0.6, PO=30W, power efficiency η=80%.
The primary peak current IP can be expressed as a function of IR and KRP, or as a function of basic parameters (PO, UImin, Dmax, η) and IR. Substitute

UImin=90V, Dmax=0.6, η=80%, PO=30W, KRP=1.0 into (5) to calculate IP=1.39A. Then calculate the effective value of the primary current

2) Design example of
continuous
mode

...
2 Analysis of feedback theory of monolithic switching power supply
Taking the basic feedback circuit of TOPSwitch as an example, the feedback theory of discontinuous mode and continuous mode is analyzed in depth. It should be noted that the feedback theory discussed here only discusses the interaction between the primary winding and the output circuit. This is different from the control circuit composed of the feedback winding and its peripheral circuit. The latter is dedicated to adjusting the duty cycle, so the following discussion does not involve the feedback winding.
2.1 Basic feedback process
The TOPSwitch series of monolithic switching power supplies can be regarded as a monolithic combination device, which combines high-voltage power switch tubes (MOSFETs) and all required analog and digital circuits to complete output isolation, pulse width modulation and various protection functions. The basic feedback circuit of TOPSwitch is shown in Figure 2. With a slight modification to the circuit, single-channel or multi-channel output, boost or buck output, positive or negative voltage output can be achieved.
In the basic feedback circuit of TOPSwitch, the high-frequency transformer has three major functions: energy storage, isolated output and voltage conversion. NP, NS, and NF in the figure represent the primary winding, secondary winding, feedback winding and their respective turns. Transient voltage suppressor (TVS) and ultrafast recovery diode (SRD) form a clamping protection circuit that can absorb the peak voltage generated by the primary leakage inductance. VD is the output rectifier tube, C2 is the output filter capacitor, and RL is the load resistor. UO is the output voltage. The AC input and rectifier filter circuit are omitted in Figure 2. The AC power passes through the rectifier bridge and filter capacitor to generate a DC input high voltage UI. When TOPSwitch is turned on, VD is in the off state, and the primary current rises along the slope. There is a formula

In the formula, IPRI is the primary current, which includes the peak current IP and the pulsating current IR. II is the initial value of the primary current. UDS(ON) is the drain-source conduction voltage of the MOSFET, and tON is the conduction time. Since VD is cut off, the primary is isolated from the output load, so the energy originally stored in C2 supplies power to the load and maintains the output voltage unchanged. At this time, the energy is stored in the high-frequency transformer in the form of magnetic field energy.
During the TOPSwitch shutdown period, the magnetic flux in the high-frequency transformer begins to decrease, and the polarity of the induced voltage of the secondary winding changes, causing VD to conduct due to forward bias. The energy stored in the high-frequency transformer is transferred to the output circuit, supplying power to RL on the one hand and recharging C2 on the other hand. The secondary current decays from the initial value according to the following formula:

In the formula, IS is the secondary current, and IPNP/NS is the initial value of the secondary current. IP is the peak value of the primary current before the TOPSwitch conduction ends. UF1 is the forward conduction voltage drop of the output rectifier tube VD. tOFF is the turn-off time of TOPSwitch. During the turn-off period of TOPSwitch, if the secondary current IS decays to zero, the output current is provided by C2.
TOPSwitch has two working modes, which depends on the last IS value during the turn-off period. If IS decays to zero during the turn-off period, it works in discontinuous mode. If the decay result of IS is still greater than zero, it works in continuous mode.
2.2 Feedback principle of two working modes in actual situations
Ideally, the influence of parasitic elements (distributed capacitance and leakage inductance) in the feedback circuit is not considered. However, in actual situations, the influence of distributed capacitance and leakage inductance must be considered, so there are peak voltages and peak currents in the working waveform.
1) Feedback principle of actual discontinuous mode
The actual discontinuous mode working waveform and simplified circuit principle are shown in Figure 3. As shown in Figure 3 (b), each switching cycle is divided into three stages in the discontinuous mode. In addition, there are three parasitic elements in the actual circuit: leakage inductance LP0 of the primary winding, leakage inductance LS0 of the secondary winding, and distributed capacitance CD. Among them, CD is the sum of TOPSwitch's output capacitance COSS and the distributed capacitance CXT of the high-frequency transformer's primary winding, that is, CD=COSS+CXT. The following specifically discusses the impact of these parasitic components on the circuit.

In stage 1, as TOPSwitch turns on, CD discharges. The energy ED stored in CD at the end of the previous cycle is released at the beginning. Because ED is proportional to UCD2, the power efficiency will be significantly reduced when the capacity of CD is large, especially when UI is high. It should be noted that in stage 1, the influence of leakage inductance can be ignored because the high-frequency transformer is storing energy and the current in the secondary winding is zero.
In stage 2, TOPSwitch turns off. The energy stored in the high-frequency transformer in the previous stage is transferred to the secondary winding. At this time, the leakage inductance LP0 and LS0 both try to hinder the change of current. Specifically, LP0 tries to hinder the decrease of the primary current IPRI, while LS0 tries to hinder the increase of the secondary current IS. Therefore, in the process of IPRI decreasing and IS increasing, a "crossover zone" is formed. The final result is that IPRI decreases to zero along the slope, and its slope is determined by the leakage inductance LP0 and the primary voltage; IS rises along the slope to the peak ISP, and the slope is determined by the leakage inductance LS0 and the secondary voltage. The key issue is that the primary current must remain continuous in the crossover zone. When the attenuated primary current flows through CD, CD is charged to UP. This peak voltage generated by the leakage inductance LP0 is superimposed on the waveform of UDS, forming a leakage inductance spike voltage, also known as a drain-source peak pulse. There is a relationship
UDS=UI＋UOR＋UP (8) .
In the actual circuit, the clamping protection circuit can be used to clamp UDS below the drain-source breakdown voltage rating of TOPSwitch (700V or 350V, depending on the chip) to avoid damage to the chip due to the increase of UDS due to UP.
In stage 3, the induced voltage UOR drops to zero. The high-frequency transformer has released all the energy stored in stage 1, reducing the drain-source voltage from UDS=UI＋UOR at the end of stage 2 to UDS≈UI. However, since this voltage change generates an attenuated oscillation waveform by exciting the resonant circuit composed of stray capacitance and primary inductance, and superimposed on the UDS waveform, it will not stop until TOPSwitch is turned on again, so the UDS waveform in stage 3 has troughs and peaks. Obviously, this decaying oscillation waveform has a "modulation" effect on the voltage and energy on CD, and determines the power loss of the conversion at the beginning of the next switching cycle.
2) Feedback principle of actual continuous mode
The feedback circuit of the actual continuous mode also has the same parasitic elements as the discontinuous mode, and the actual characteristics of the output circuit must also be considered. An ideal rectifier should have no forward conduction voltage drop and reverse recovery time. The reverse recovery time of the junction rectifier is caused by the minority carriers passing through the diode junction, while the reverse recovery time of the Schottky diode is caused by the junction capacitance. For monolithic switching power supplies, it is recommended to use Schottky diodes with extremely short reverse recovery time or ultra-fast recovery diodes as output rectifiers. Ordinary low-speed rectifiers must not be used, because the latter not only increases high-frequency losses and reduces efficiency, but also causes thermal breakdown of the rectifier.
The operating waveform of the actual continuous mode is shown in Figure 4. In stage 1, when TOPSwitch starts to turn on, there is still current passing through the secondary, which means that at the moment of turn-on, UDS=UI+UOR, not UDS=0. As a result, the power consumption of TOPSwitch during turn-on is higher than that of discontinuous mode. This is because additional energy is stored in the distributed capacitor CD. In addition, before the secondary winding output is turned off, the secondary leakage inductance LS0 must be charged, resulting in a current crossover phenomenon in the process of IS increasing and IPRI decreasing. Once LS0 is charged, the output rectifier is reverse biased and cut off, causing the secondary current IS to become zero, and this change in IS is sensed to the primary winding, resulting in a reverse recovery current peak (spike current) at the leading edge of the primary current waveform. This spike current causes the primary current to increase suddenly and instantly, which can easily cause the internal overcurrent protection circuit to malfunction. For this reason, a leading edge latch circuit is specially designed inside TOPSwitch. Its function is to block the rising edge of the overcurrent comparator output for 180ns when TOPSwitch is just turned on, so as to avoid the spike current and prevent false triggering.

During the shutdown period of TOPSwitch, there is no phase 3, only phase 2. At the moment of shutdown, affected by the leakage inductance LP0 and LS0, the primary current and the secondary current will also form a crossover area, which causes UDS to rise to (UI + UOR). However, unlike the discontinuous mode, the induced voltage UOR will exist until TOPSwitch turns on again, so there is no time interval after UOR drops to zero (i.e. phase 3).