Comparison of Several Secondary-Side Rectification Circuits in Isolated Low-Voltage/High-Current Output DC/DC Converters

1 Introduction

With the rapid growth of market demand for computer communication equipment and new network products, the future power supply market is very optimistic. The market demand for low-power converters is showing a rapid upward trend. According to experts' predictions [1-2], in the next five years, the development trend of low-power DC/DC converters is: to adapt to the rapid development of ultra-high frequency CPU chips, DC/DC converters will develop in the direction of low output voltage (as low as 1.2V), high output current, low cost, high frequency (400-500kHz), high power density, high reliability (MTBF≥106h), and high efficiency.

As an important component of the DC/DC converter, the rectifier circuit has a great impact on the performance of the whole machine. The traditional rectifier circuit uses a power diode. Due to the high on-state voltage drop of the diode (typical value is 0.4V~0.6V), the rectification loss is large. In order to meet the requirements of various data processing integrated circuits for faster speed, lower power consumption and higher integration, the operating voltage of the integrated chip will be further reduced to 1V~3V (the current typical value is 2.8V~3.3V). When the DC/DC converter outputs such a low voltage, the power consumption of the rectifier part will account for a larger proportion of the output power, resulting in lower efficiency of the whole machine, which becomes an obstacle to the miniaturization and modularization of the power supply. The application of synchronous rectification technology and the use of low on-resistance MOSFET instead of conventional rectifier diodes can greatly reduce the power consumption of the rectifier part, improve the performance of the converter, and achieve high efficiency and high power density of the power supply [34].

Taking into account the diversity of secondary-side rectifier circuits of DC/DC converters, this article analyzes and compares several commonly used secondary-side rectifier circuits for low-voltage/high-current output DC/DC converters, and explains the current-doubler rectifier topology in detail, hoping to be helpful for power supply design.

2 Review of the secondary side rectifier circuit

2.1 Several common secondary side rectifier circuits

As shown in Figure 1, Figure 2(a), Figure 3(a), and Figure 4(a), they are full-bridge rectification, half-wave rectification, full-wave rectification, and current-doubler rectification topologies, respectively. Full-bridge rectification uses two more rectifier tubes than the other three rectification methods, which greatly increases the conduction loss and is therefore not suitable for low-voltage/high-current output applications. Therefore, in the following text, the full-bridge rectification method is not used as a comparison object.

Half-wave rectification and full-wave rectification are commonly used.

Figure 1 Full-bridge rectifier

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Figure 2 Half-wave rectification topology and its principle waveform (a) diode half-wave rectification (b) MOSFET half-wave rectification (SR) (c) principle waveform

Figure 3 Full-wave rectifier topology and its principle waveform

(a) Diode full-wave rectification (b) MOSFET full-wave rectification (c) Principle waveform

The principle is not described in detail, but the focus is on a more detailed principle analysis of the "new" rectification topology which has been quite popular in recent years - the current doubler rectification method.

2.2 Principle Analysis of Current-Doubling Rectification Circuit

As early as 1919, the idea of ​​"current doubler rectification" [5] was proposed in the mercury arc tube rectifier circuit, but it was not taken seriously. With the recent research boom of low voltage/high current output DC/DC converters, this rectification idea has regained attention. It evolved from the full-bridge rectification method, that is, two independent inductors with the same value are used to replace a group of rectifier tubes in the full-bridge rectification topology, while maintaining the "full-bridge rectification" form. After appropriate deformation, the topology shown in Figure 4 is obtained. Figure 5 shows a schematic diagram of the evolution process from full-bridge rectification to current doubler rectification.

As shown in Figure 4, VSEC is the voltage waveform of the secondary winding of the transformer. The following is a brief analysis of the circuit operation in one cycle TS [6].

(1) t0-t1: The transformer secondary winding is positive, SR2 (D2) is in the on state, SR1 (D1) is in the off state (SR1 and D1, SR2 and D2 have the same switching states, and the SR tube is used to explain the working principle below), the current in the inductor L1 increases, and the current in L2 decreases. The corresponding relationship is as follows: VL1 = V2 - V0 = L1 (1) VL2 = - V0 = L2 (2)

Figure 4 Current-doubling rectifier topology and its principle waveform

(a) Diode current doubler rectification (b) MOSFET current doubler rectification (c) Principle waveform

(2) t1-t2: The voltage of the secondary winding of the transformer is zero, and the rectifier tube SR1,

SR2 is turned on. The currents through inductors L1 and L2 are decreasing and in a freewheeling state. The corresponding relationship is: VL1=-V0=L1 (3) VL2=-V0=L2 (4)

(3) t2-t3: The secondary winding of the transformer is negative, and the power tube SR1

In the on state, SR2 is in the off state, the current on the inductor L1 decreases, and the current on L2 increases. The corresponding relationship is: VL1=-V0=L1 (5) VL2=V2-V0=L2 (6)

(4) t3-t4: The voltage of the secondary winding of the transformer is zero, and the rectifier tubes SR1 and SR2 are both turned on. The currents through the inductors L1 and L2 are both decreasing and in the freewheeling state. The corresponding circuit equation is the same as that of the t1-t2 period.

In a complete switching cycle Ts, the currents through the inductors L1 and L2 increase in their respective time periods of 0 to DTs, and decrease in the time period of (1-D)Ts, and the current increase and decrease in the two time periods are equal. The corresponding relationship is as follows: L=V2-V0, L=V0, Δi(+)=Δi(-)

After sorting, we can get:

V0=DV2(7)

Where: D = tON / Ts

The essence of current doubling rectification is the staggered parallel connection of two inductors. The voltage and current flowing through inductors L1 and L2 are 180° out of phase. When the voltage of the secondary winding of the transformer is non-zero, the current flowing through L1 and L2 increases and decreases, realizing the mutual cancellation of the ripple current of iL1 and iL2, thereby greatly reducing the ripple of the total load current (i0=iL1+iL2). Under the same output voltage ripple requirements, this current doubling rectification method significantly reduces L1 and L2, speeding up the dynamic response of the power stage.

The current waveforms of inductors L1 and L2 differ by 180°. The relationship between the peak-to-peak value of the composite current (i0=iL1+iL2) and the peak-to-peak value of the ripples of iL1 and iL2 is expressed by the current cancellation ratio K12. K12 is related to the duty cycle D. The relationship is as follows: K12=2-(D≤0.5) (8)

The corresponding relationship is shown in Figure 6. It can be seen intuitively from Figure 6 that when D=0.5, that is, V2=2V0, there is a complete ripple mutual cancellation effect (the output current achieves zero ripple). The further D deviates from 0.5, the worse the ripple mutual cancellation effect. When D=0.25, the ripple mutual cancellation ratio is only 67%. Therefore, in the current doubler rectifier topology, in order to utilize its ripple mutual cancellation effect, it is hoped that D is around 0.5.

3 Comparison of several rectifier circuits

In order to fully understand the advantages and disadvantages of half-wave rectification, full-wave rectification and current doubler rectification topologies and facilitate optimal selection, the following three rectification methods are compared one by one from multiple aspects such as rectifier tube conduction loss, magnetic component size, number of high current winding connection points, SR drive mode, primary side applicable topology, etc. The comparison is based on the same conditions, namely, the converter power level, switching frequency fs, secondary voltage Vsec amplitude V2, duty cycle D defined by each topology, output voltage VO and its ripple ΔVO requirements, and the same output filter capacitor C.

Figure 5: Simplified diagram of the evolution process of full-bridge rectification to current-doubler rectification

Figure 6 Schematic diagram of inductor current ripple cancellation

3.1 Rectifier conduction loss

(1) In the half-wave rectifier topology, during the tON period, the load current IO flows through SR1; during the tOFF period, IO flows through SR2. Therefore, in one switching cycle Ts, the total conduction loss of the two rectifiers is equivalent to the conduction loss of the load current flowing through one rectifier (the loss calculation formula uses MOSFET). The basic relationship is:

Phw=m·IO2Rds(on)(9)

Where: m is the number of MOSFETs connected in parallel as SR1 or SR2 (the number of SR1 and SR2 connected in parallel is generally equal);

Rds(on) is the on-resistance of MOSFET.

(2) During the tON period of the center-tapped full-wave rectifier, the load current IO flows through SR1 or SR2; during the tOFF period, the load current is equally divided between the two rectifiers, thereby reducing the conduction loss of the rectifier during the tOFF period. When a Schottky diode is used as a rectifier, the loss reduction is not very obvious because the Schottky volt-ampere characteristic is an exponential relationship. When a MOSFET is used as a synchronous rectifier, its voltage and current are approximately linearly related, and the loss is significantly reduced. The total conduction loss of the rectifier in one cycle is approximately: Pfw = m··IO2Rds(on)

D<1 (10)

(3) The current flow in the current doubler rectifier topology SR1 and SR2 is similar to that of full-wave rectifier. The total conduction loss of the rectifier tube in one cycle is approximately: Pcd = m··IO2Rds(on)

D<0.5 (11)

The corresponding relationship between the conduction loss of the rectifier tubes in the three rectification modes (the reference value is m·IO2Rds(on)) and D is shown in Figure 7. As can be seen from Figure 7, the smaller D is, the smaller the conduction loss of the rectifier tubes in the full-wave rectification and current doubler rectification topologies is compared with the half-wave rectification. From the perspective of loss, when working near Dmax (full-wave rectification: Dmax=1; current doubler rectification: Dmax=0.5), the latter two rectification topologies do not have much advantage over the half-wave rectification.

3.2 Magnetic components

(1) Filter inductor

① The voltage frequency on the inductor of the half-wave rectifier topology is the same as the switching frequency fs. The inductance that meets the specified ripple requirements [7] is: Lhw = (12)

②The frequency of the voltage on the inductor of the center-tapped full-wave rectifier topology is

At twice the switching frequency, the inductance that meets the specified ripple requirement is: Lfw=(13)

Figure 7 Comparison of conduction losses of rectifier tubes in three rectifier topologies

③ The current doubler rectifier topology has independent voltages on inductors L1 and L2.

The frequency of is equal to the switching frequency fs, but from the previous analysis, it can be seen that there is a ripple cancellation effect between two independent inductor currents in the topology, and the frequency of the two inductor composite current is twice the switching frequency fs. When D is close to 0.5, the ripple cancellation effect is very significant, so the required filter inductance value can be greatly reduced. The inductance that meets the specified ripple requirements is: L1=L2=··(14) It can be seen that under the same conditions, in order to meet the same output voltage ripple requirements, the filter inductance values ​​required by the latter two rectification topologies are significantly smaller than the former. If the half-wave rectifier output filter inductance is the reference value L, then full-wave rectification only requires ·L, and double current rectification only requires ·L, thereby reducing the ripple design pressure of the output filter capacitor and reducing the inductor size. Of course, the formula given here can only be used as a rough comparison, and does not take into account the influence of the ESR and ESL of the actual capacitor.

(2) Transformer

Assuming that the output filter inductor is very large, the inductor current ripple can be ignored, and iL=IO, iL1=iL2=IO/2. ① Half-wave rectifier topology During the tON period when SR1 is turned on, the load current IO flows through the secondary winding of the transformer, and during the tOFF period when SR2 is turned on, the current of the secondary winding of the transformer is zero. The effective value of the secondary current of the transformer is approximately: ISEC=IO·. ② Center-tapped full-wave rectifier topology During the tON period when SR1 and SR2 are turned on respectively, the load current IO flows through one of the center-tapped windings of the secondary side of the transformer; during the tOFF period when SR1 and SR2 are turned on together, the load current is equally divided between the two rectifier tubes, and half of the load current (IO/2) flows through both center-tapped windings. The effective value of the secondary current of the transformer is approximately: ISEC=IO· (both windings are equal to Isec). ③ Current-doubling rectifier topology During the tON period when SR1 and SR2 are turned on respectively, half of the load current (assuming IL1=IL2=IO/2) flows through the secondary winding of the transformer; during the tOFF period when SR1 and SR2 are turned on together, the load current forms a discharge loop through two inductors and two rectifiers, and does not flow through the secondary winding of the transformer (only a very small magnetizing current flows in the transformer winding, which can be ignored), that is, during the tOFF period, the current of the secondary winding of the transformer can be considered to be zero. The effective value of the secondary current is approximately: ISEC=IO·.

Figure 8 shows the corresponding relationship between the effective value of the transformer secondary current (reference value is IO) and D in the three rectification methods. It can be seen that when D is equal, the secondary winding Irms of the current doubler rectification and half-wave rectification topology transformers are equivalent. The size of the secondary winding Irms of the two topology transformers and the secondary winding Irms of the full-wave rectification topology is related to the duty cycle D: when D<0.33, the former is smaller than the latter; when D>0.33, the former is larger than the latter. It should be noted that the center-tapped full-wave rectifier secondary has two windings, while the other two rectification methods have only one winding.

It is particularly important to point out that the current-doubler rectifier topology is particularly suitable for the application of magnetic integration technology [8]. Generally, two integration ideas can be adopted: two inductors are integrated on a magnetic core, and two inductors and a transformer are integrated on a magnetic core. In the current-doubler rectifier topology, although the current ripple synthesized by the interleaving of the inductor currents is small, the current ripple flowing through the discrete inductors L1 and L2 is large. Therefore, when discrete inductor components are used, the magnetic flux pulsation corresponding to each inductor is large, causing large magnetic core losses and affecting the efficiency of the whole machine; when the inductors L1 and L2 are integrated on a magnetic core (such as EE or EI type), the inductor windings are wound on the two outer legs respectively, and the corresponding magnetic flux overlaps on the center column, which can achieve the mutual cancellation of the magnetic flux pulsation, thereby greatly reducing the magnetic core loss and magnetic core volume of the center column. The corresponding schematic diagram is shown in Figure 9 [9].

Furthermore, three discrete magnetic components can be integrated on a magnetic core [10], as shown in Figure 10, and the integration of the magnetic core and the winding is achieved at the same time, thereby greatly reducing the total volume occupied by the magnetic components and simplifying the layout and packaging design. Compared with half-wave and full-wave rectification, it has significant advantages.

3.3 High current winding connection point and layout design

Considering that several rectifier circuits are used in large current output situations, the number of large current windings and the number of winding connection points are compared.

(1) The half-wave rectifier topology has two high-current windings and four high-current winding connection points.

(2) The full-wave rectifier topology has three high-current windings and five high-current winding connection points (assuming that in the center-tapped structure, the middle connection between the two secondary windings is completed inside the winding).

(3) The current-doubler rectifier topology has three high-current windings and six high-current connection points; after considering the integration of two inductors and a transformer, there are only two high-current windings and three high-current winding connection points. It can be seen that the current-doubler rectifier topology after the application of magnetic integration technology has fewer high-current windings and fewer high-current winding connection points than the previous two rectifier topologies. Therefore, the layout of the secondary side is greatly simplified, and the losses related to the layout are further reduced, making the overall packaging design easier.

Figure 8 Comparison of the effective value of the secondary winding current of three rectifier topology transformers

Figure 9 Two inductors integrated

(a) Schematic diagram of the integration of two inductor cores (b) Schematic diagram of the mutual cancellation of magnetic flux pulsation

Figure 10 Integration of three discrete magnetic components

3.4 Driving method of synchronous rectifier (low voltage power MOSFET) and consideration of primary side topology

(1) Driving method of synchronous rectifier

The driving methods of synchronous rectifiers can generally be divided into two categories:

——External Control: Through additional logic control and drive circuits, a drive signal that changes with the secondary voltage of the main transformer is generated to drive the synchronous rectifier. The drive signal voltage amplitude of this drive mode is constant and does not change with the secondary voltage amplitude. The drive waveform is good, but a complex control drive circuit is required, which increases the cost and prolongs the R&D time.

——Self-driven Synchronous Rectification: that is, directly obtaining the voltage drive signal from a certain point in the circuit to drive the synchronous rectifier. The most common method is to directly obtain the drive voltage from the winding of the main transformer. This drive solution is simple, economical and reliable, but the drive waveform quality is not as ideal as that of the external control drive circuit [11].

① The half-wave rectifier topology is connected as shown in Figure 2. It can directly obtain voltage from the secondary side of the transformer to drive the SR to work. This has been widely used in DC/DC converters with standard voltage outputs such as 5V and 3.3V. When the output voltage is lower, an auxiliary winding can be added to the main transformer to obtain a driving voltage with an amplitude sufficient to drive the synchronous rectifier.

② Full-wave rectifier topology and current doubler rectifier topology Because the secondary voltage of the main transformer has a long zero period (tOFF), if the self-driven SR method that directly obtains the voltage from the secondary side of the transformer is used, during these tOFF periods, SR1 and SR2 are both turned off, and the inductor current will flow through the body diodes of SR1 and SR2, resulting in increased power consumption of the rectifier part and losing the advantage of using synchronous rectifiers. Related literature [6] proposes a hybrid drive method, using a symmetrical half-bridge current doubler rectifier topology and using the parasitic parameters of the circuit to make SR1 and SR2 both conductive during the tOFF period. Although it is a good idea, it cannot guarantee that SR1 and SR2 can be effectively turned on during the tOFF period in all load ranges. Moreover, the correct switching operation of SR1 and SR2 is greatly affected by the leakage inductance of the transformer. In transformer manufacturing, it is difficult to ensure the consistency of leakage inductance, so the practical value is not obvious. For this topology with a large tOFF period of secondary voltage, external control drive is often used to ensure the accuracy of the switching timing, thereby ensuring the reliability and performance of the circuit operation.

(2) Consideration of primary edge topology

① Half-wave rectifier topology The primary side topology mostly adopts the forward circuit, so the selection of magnetic reset method is very critical, which will determine the working mode of the main transformer [12]. Different from other magnetic reset methods, the active clamp forward circuit shown in Figure 11 (a) can make the main transformer bidirectionally magnetized, thereby reducing the size of the main transformer.

② Full-wave rectification topology is usually compared with Figure 11 (b), (c), (d) for several secondary rectification circuits in isolated low voltage/high current output DC/DC converters. Note: m: the number of MOSFETs in parallel used as synchronous rectifiers; Rds(on): MOSFET on-resistance;

＊: Depending on the reset method, some topologies can work at D>0.5, but the general compromise optimization considers D<0.5;

**: Assuming that all secondary windings are single-turn, the number in brackets is the number after adopting magnetic integration technology;

***: Assuming that in the full-wave rectifier topology, the middle connection between the two secondary windings is completed inside the winding, the number in brackets is the number after the magnetic integration technology is adopted;

Figure 11 Several primary side topologies

(a) Active clamp (b) Symmetrical half bridge (c) Push-pull (d) Full bridge

***: The half-wave rectification method of applying synchronous rectification on the secondary side can be combined with the forward topology using different reset methods, such as RCD reset, resonant reset, etc.

The corresponding push-pull, symmetrical half-bridge and full-bridge topologies are combined to obtain a positive and negative symmetrical secondary voltage.

③ Current-doubling rectifier topology The literature [13] gives a topology that combines the forward topology with the current-doubling rectifier topology—the forward-flyback circuit. In this circuit, when the primary main tube is turned off and the auxiliary tube is in the on state, the transformer acts as an energy source, and the magnetizing current is as high as IO/2, which is reflected to the primary value (IO represents the load current), increasing the current stress and loss of the primary switch, and the transformer design is relatively complex. Based on the above considerations, this article does not compare and select this topology.

In low voltage/high current output situations, symmetrical primary side topologies such as push-pull, symmetrical half-bridge, and full-bridge are more suitable for use in combination with current doubler rectification topologies.

Among these three topologies, under the same conditions, the current stress and voltage stress of the primary power tube of the full-bridge are the lowest; the current stress of the primary power tube of the half-bridge topology is twice that of the full-bridge, and the voltage stress is equal to that of the full-bridge; the voltage stress of the primary power tube of the push-pull topology is twice that of the full-bridge (the actual voltage stress of the push-pull topology is often higher than twice the input voltage due to leakage inductance problems), and the current stress is equal to that of the full-bridge. Therefore, it can be inferred that in the future, for the recommended bus voltages of 12V and 48V for low-voltage/high-current output DC/DC converters, the push-pull topology is more suitable for 12V bus input; while the half-bridge is more suitable for 48V bus input; the full-bridge topology has the advantages of low current stress and low voltage stress of the power tube, but the number of components in the full-bridge topology is relatively large, so from the perspective of the number of components and overall simplicity, the full-bridge is not the best choice. However, with the development trend of high frequency, in order to improve the conversion efficiency, it is necessary to realize the soft switching of the primary power tube, and the full-bridge phase-shifted PWMDC/DC converter can easily achieve the ZVS requirement of the main tube. Therefore, in high-frequency, low-voltage/high-current output DC/DC converters, the full-bridge topology is still a good choice.

The above is a detailed comparison of the three rectifier circuits. Here is a summary of the relevant content, as listed in Table 1.

4 Conclusion

This paper analyzes and compares the three rectification methods of secondary side half-wave rectification, full-wave rectification and current doubler rectification in detail for the application of isolated low voltage/high current output DC/DC converters, points out their respective advantages and disadvantages and application guidance, and concludes that the current doubler rectification topology combining magnetic integration technology and synchronous rectification technology is particularly suitable for isolated low voltage/high current output DC/DC converters.