Power management requirements for the next generation PCI backplane

High-speed buses make power supply design more difficult
As many high-speed processors, large-capacity hard disks and disk arrays, graphics cards, Ethernet and fiber-optic data communications, and memory arrays communicate at ever-faster speeds, faster bus interfaces are necessary to meet their application requirements.
Modern semiconductor technology can produce faster logic circuits than ever before, but increasing the speed of logic circuits alone is not enough to speed up buses. Bus architects must deal with bus capacitance, signal skew caused by different signal line lengths, unpredictable bus load variations, and system component tolerances. The faster the bus, the more accurate the voltage must be. These problems are all related to the power supply of the bus transceiver, commonly known as I/O power or VIO. Therefore, modern buses must be carefully designed to effectively maximize their performance.
Old and new PCI compatible
Backward compatibility is the biggest advantage of the PCI bus. The PCI task force has developed a method to allow PCI expansion slots to support both new and old PCI boards. Early PCI boards and PCI-X 1.0 (also known as mode-1) boards used 3.3V VIO, while PCI-X 2.0 266MHz and 533MHz (also known as mode-2) boards use 1.5V VIO. If a mode-2 board is misused with 3.3V, it will fail; if a legacy or mode-1 board is misused with 1.5V, it may not have enough voltage to generate a logic "1" signal on the bus.
The original PCI standard used different pin edge shapes to allow 5V and 3.3V boards to coexist, but this approach does not provide backward compatibility. PCI-X 2.0 borrows modern high-performance microprocessor technology to solve this problem, that is, to use logic-selectable voltage circuits. The
PCI board connector has a compatibility pin called PCIXCAPPCI-X. The PCI system uses the analog-to-digital converter on the system board to measure the PCIXCAP voltage to determine the PCI board speed. Traditional PCI boards will ground PCIXCAP, causing the expansion slot controller to limit the bus speed to 33MHz. PCI-X 66MHz boards will add a 10kΩ pull-down resistor to the PCIXCAP pin to allow PCI-X to operate at 66MHz; PCI-X 133MHz boards will float PCIXCAP to enable 133MHz operation.
This technique can also set the entire bus based on the voltage of the shared PCIXCAP pin. For example, if only one PCI board grounds PCIXCAP, the entire bus will use 33MHz; if the PCIXCAP pin is floating high, it means that all PCI boards are PCI-X 133MHz, putting the bus into 133MHz operation mode. If some boards add a 10kΩ pull-down resistor to PCIXCAP, the PCIXCAP pin voltage will be lower than the floating high voltage, but still above the ground voltage, and the bus will operate at PCI-X 66MHz speed.
PCI-X 2.0 defines two new pull-down resistor values: 3.16kΩ for PCI-X 266MHz and 1.02kΩ for PCI-X 533MHz, further expanding this technology to five operating speeds. The system can set the bus speed and VIO voltage based on information provided by the PCIXCAP analog-to-digital converter.
Engineers still need to solve many other problems to complete the 64-bit 266MHz expansion slot implementation. Although the bridge technology speed has enabled a bridge to support six 32-bit 66MHz PCI expansion slots, it can only handle two 64-bit 133MHz PCI-X 1.0 bus expansion slots; PCI buses above 266MHz require the bridge to be directly connected to the expansion slot to meet the ultra-high data rate requirements between the two.
PCI VIO Specifications
When using 3.3V or 5V I/O power and slower data rates, the PCI system outputs low and high voltages that still meet TTL specifications even if the power supply voltage varies slightly. However, if VIO drops to 1.5V and the data rate increases to above 266MHz, the signal amplitude range will be greatly reduced, and the signal settling time will become relatively more important.
The PCI specification has the following requirements for different VIO voltages:
Supply voltage
Supply voltage
Tolerance range
Supply voltage
Tolerance range
Maximum load Current
Voltage
difference between expansion slot and bridge
Voltage difference between expansion slot and bridge
5V
±5%
±250mV
5A
Unspecified Unspecified
3.3V
±
9.1%
±300mV
7.6A
±3%
±100mV
1.5V
±5%
±75mV
1.5A
±1%
±15mV
PCI-X mode 1 requires that the 3.3V VIO voltage of the expansion slot and the bridge cannot differ by more than ±100mV; this means that the bridge chip VIO voltage must be within 100mV of the expansion slot VIO voltage to tolerate the current sensing resistor, independent power switching FET switch transistor, and possible voltage drop of the signal line. But if the VIO voltage is 1.5V, the expansion slot and bridge voltages cannot differ by more than ±15mV; the only way to ensure that the expansion slot and bridge voltages are within the required range is to use the same power supply and connect their power contacts together with short and thick wires.
There are also many new restrictions on the VIO voltage requirements. For example, the bridge chip must be able to turn the VIO voltage on and off and select the voltage value between 3.3V and 1.5V. The power supply selection switch cannot drop more than ±75mV when providing power to the expansion slot load (up to 1.5A) and the bridge chip load (up to 1.5A or more, depending on the bridge chip).
VIO power implementation
Some systems use its 1.5V power plane to provide VIO voltage to mode-2 bridges and PCI-X expansion slots. These systems can use switching circuits to provide the VIO voltage by following these simple rules:
1. Deliver the VIO voltage to the bridge and expansion slots with wide and short traces.
2. Slightly increase the 1.5V power plane voltage.
3. Use very low on-resistance power FET transistors and current sensing elements.
4. Use two FET switching transistors on a "blocking series connection" to deliver the 1.5V power supply to the bridge and expansion slots. In this way, whether the expansion slot voltage is 0V or 3.3V, as long as the FET is in the off state, no current will flow from the expansion slot through the FET body diode into the 1.5V power plane.
In addition to using the above switching circuit, it is also possible to use a 1.8V power supply to provide the VIO voltage to the mode-2 expansion slot and bridge chip, and then use a low-dropout linear regulator to step down the 1.8V to 1.5V. This approach allows the use of lower-cost FET transistors and has wider circuit board routing requirements. For example, designers can use low-dropout voltage regulator components such as UC382-1. In this case, the power FET will play multiple roles such as power selector, voltage regulator, and hot-swap power switch.
The connection between the expansion slot VIO pin and the component 15VIS pin is extremely important; since it serves as both current sensing and voltage regulation sensing, special attention should be paid when routing. If the system cannot provide low-voltage power, a programmable switching regulator can also be used to provide the VIO voltage; for example, using a PTH05000 VRM voltage regulator module that accepts a 12V input power supply to provide 3.3V or 1.5V voltage, or using a switching regulator component such as the TPS5431
0 SWIFT with a built-in FET transistor . Hot-plug power control PCI and PCI-X are widely used in a variety of platforms, notebooks, desktops, servers and industrial systems. Most notebooks and desktops use PCI as the internal data bus; external devices are connected using USB, Firewire, PCMCIA, Cardbus or Express Card. These devices have their own power management and device hot swap protocols. PCI and PCI-X can also remove connected devices without shutting down the system; this hot plug function is key to high-availability systems such as servers that can be serviced without interrupting operations. Designers must use system drivers and hardware to provide full PCI hot plug functionality. The PCI hot plug expansion slot socket is exactly the same as the traditional PCI expansion slot; it also has a circuit board lock switch, a circuit board service request button, and standard circuit board status indicators. Board management and control is handled by the Standard Hot Plug Controller (SHPC); it monitors slot switches, commands slots to power up or down, powers up or down bus switches, bypasses data around powered-down slots, and manages slot indicator light states. Another power simulation component, called the Hot Plug Power Controller (HPPC), switches slot power. The HPPC provides various power and simulation functions; such as slot switch voltage debouncing and buffering, board type determination, selection of appropriate slot VIO voltage, switching slot 12V, 5V, 3.3V, Vaux, and -12V supplies, driving slot bus switches, and driving slot indicators. The HPPC also provides current limiting for each bus supply to prevent a faulty board from overloading or drooping the backplane power supply. The TPS2363 Hot Plug Power Controller provides hot-plug capabilities for PCI Express. This component can switch the two expansion slot Vaux, 3.3V and 12V main power supplies, monitor the lock and service request switches in the two expansion slots; it can also immediately disconnect the expansion slot to protect the power supply from damage if any power supply is overloaded. Facing practical problems Modern logic components can withstand large current surges from the power supply, and the switching speed can reach less than 500ps. The actual current limiting circuit must provide instantaneous large current when necessary, and it must also be able to quickly cut off the expansion slot power supply after the expansion slot current reaches a dangerous level for a period of time; otherwise, the surge in expansion slot current may cause the backplane voltage to drop, thereby affecting the normal operation of other devices on the backplane. The layout of current sensing components and wires is also important. For high-density circuit board component layout, engineers should choose high-density inline power packages that can be placed directly between PCI sockets. For example, the TPS2343 uses an 80-pin TVSOP package with a pin end width of less than 8.5 cm. Serial buses have begun to appear in modern electronic systems and compete with traditional parallel buses; these two buses must coexist in the short term. Serial buses do not have data path skew issues, so more flexible wiring and connector designs can be used. The reduction in the number of pins makes serial buses more compact; however, power path arrangement and power safety protection are still extremely important for serial buses. Although semiconductor technology can integrate more functions into lower-cost components, connectors and other mechanical parts are becoming increasingly expensive. Now is the turning point for serial buses to replace parallel buses. Although the cost of PCI Express has dropped to the level of PCI-X and will be lower in the future; PCI, PCI-X 1.0 and PCI-X 2.0 still have advantages such as low cost, backward compatibility, and easy implementation, which means that they will still be popular in the market for some time.