Using different timing to drive the rectifier makes the computer power supply "platinum"

introduction

80+ and Climate Savers Computing have set a strong efficiency standard for computer power supplies. The “Platinum” level of these standards states that computer power supplies must be 90% efficient at 20% rated load, 94% efficient at 50% rated load, and 91% efficient at 100% load. To meet these standards, some power supply designers choose to use a phase-shifted, full-bridge DC/DC converter with synchronous rectification. This topology is a better choice because it can achieve zero voltage switching (ZVS) on the main FET. A popular method of driving the synchronous rectifiers is to drive the main FET with an already existing signal. The only problem with this is that it requires a delay in the main FET to achieve zero voltage switching. This causes both synchronous rectifiers to turn off at the same time during the fast freewheel period, allowing excessive body diode conduction and ultimately reducing system efficiency. The purpose of this article is to suggest a different timing for driving these synchronous rectifiers to reduce body diode conduction and ultimately improve overall system efficiency.

There are pulse width modulators (PWMs) on the market that are designed to control phase-shifted, full-bridge converters rather than drive synchronous rectifiers (QE and QF). Engineers have found that they can use these controllers in this application by controlling the synchronous FETs through the control signals OUTA and OUTB of the PWM controller. Figure 1 shows a functional diagram of one of these converters.

Figure 1 Synchronous rectification improved phase-shifted, full-bridge converter

question

The PWM controller helps achieve ZVS in these converters by delaying the turn-on of the FETs of the H-bridge (QA, QB, QC, QD). The delay (tDelay) between the turn-on and turn-off transitions of FETs QA and QB causes the synchronous FETs QE and QF to turn off simultaneously, allowing their body diodes to conduct as described above. The following equations provide a good estimate of the body diode conduction losses of QE and QF during freewheeling:

Where POUT is the output power, VOUT is the output voltage, VD is the forward voltage drop of the body diode, and fs is the inductor switching frequency.

Excessive body diode conduction losses (PDiode) of QE and QF will prevent the design from meeting the “Platinum” standard. See Figure 1 and Figure 2 for more details. As shown, OUTA drives FETs QA and QF, while OUTB drives FETs QB and QE. V1 is the voltage at the input of the LOUT and COUT filter network, while VQEd and VQFd are the voltages of the corresponding synchronous rectifiers QE and QF.

Figure 2 Timing diagram of the converter shown in Figure 1

Solution

If you want to reduce the QE and QF body diode conduction, it is best to turn on these synchronous rectifiers during the QA and QB delay period (tDelay). To do this, the FETs QE and QF must be driven by their own outputs, where the "on" time and non-synchronous "off" time overlap. Figure 3 shows the functional schematic of a phase-shifted, full-bridge converter with six separate drive signals (OUTA to OUTF). The signals for QE (OUTE) and QF (OUTF) are generated by turning OUTE and OUTF on and off according to the edges of QA to QD. Table 1 and Figure 4 show the timing required to accomplish this. The theoretical waveforms shown in Figure 4 show that this technique eliminates the body diode conduction that occurs with the gate drive signals shown in Figure 2 when both gate drives are off during tDelay.

Table 1 OUTE and OUTF on/off transition

Figure 3. Phase-shifted, full-bridge converter using the timing of Table 1.

Figure 4 Timing diagram for reducing QE and QF body diode conduction

Test results

To see how effective this technique is in reducing body diode conduction, a 390-V to 12-V phase-shifted, full-bridge converter was modified to drive the FETs with the signals shown in Figures 2 and 4.

Figure 5 shows the waveforms of the gates of the synchronous FETs (QE and QF) driven by the OUTA and OUTB PWM outputs. In the figure, the body diode conduction can be observed during the delay time (tDelay) between OUTA and OUTB.

Figure 5 QE and QF main diode conduction waveforms

Figure 6 shows the waveforms of the gates of the synchronous FETs (QE and QF) driven by the OUTE and OUTF signals shown in Figure 3. These signals are generated from TI's new UCC28950 phase-shifted, full-bridge controller. Figure 6 shows that the body diodes are not conducting while FETs QE and QF are conducting. Although some body diode conduction can still be seen, it is not as much as in Figure 5.

Figure 6 shows the waveforms of the QE and QF low body diode conduction

We measured the efficiency of a 600-W DC/DC converter from 20% to full load for both drive schemes (OUTA and OUTB vs. OUTE and OUTF). In Figure 7 on the next page, converter efficiency data for both drive schemes is shown. We can see that using OUTE and OUTF is about 0.4% more efficient from 50% to 100% load than using OUTA and OUTB. A 0.4% efficiency increase may not seem like much, but it adds up when designers are striving to reach the “platinum” standard.

Figure 7 Efficiency of a 600-W DC/DC converter under different QE and QF driving schemes

in conclusion

Even if we can control a phase-shifted, full-bridge converter with synchronous rectifiers through a phase-shifted, full-bridge controller that is not designed for synchronous rectification (OUTA and OUTB drive scheme), the turn-on delay between OUTA and OUTB required to achieve ZVS will cause both synchronous FETs to turn off at the same time (tDelay). This delay will cause excessive body diode conduction during the fast freewheeling period of the FETs. This article shows that a more effective approach is to superimpose the "on" time of the synchronous rectifiers during the fast freewheeling period so that the body diode does not conduct. With this approach, although the body diode conduction is not completely eliminated, it is greatly reduced, thereby improving the overall system efficiency and making the "platinum" efficiency standard easier to achieve.