Multi-service integration drives high-definition video chip integration

The camera image processing chip is the core component of the camera. After the camera sensor converts the optical signal into an electrical signal, it must be processed by the SoC chipset before it is emitted from the back end. It carries a lot of work such as image processing and analysis, encoding and decoding, and compression. If it is a smart device, it will also be embedded with a large number of intelligent analysis algorithms. In the era of high-definition monitoring, its role is even more prominent.

At present, the mainstream products of domestic security video surveillance systems have gradually changed from pure analog video surveillance systems more than ten years ago to pure digital million-level high-definition video surveillance systems, that is, digital signals are used in video acquisition, video transmission, video recording and playback. Compared with analog video surveillance equipment, million-level high-definition digital cameras have greatly improved the image quality. Compared with the transmission technology of analog surveillance equipment, digital video surveillance equipment only needs ordinary network cables, which is easy to achieve long-distance transmission. More importantly, it reduces the project cost and is easy to maintain. With the increasingly complete supporting equipment of pure digital high-definition monitoring systems and the increasingly perfect solutions, networking has become an irreversible trend in the field of security video surveillance and has occupied a dominant position in the market.

From the perspective of the composition structure of a digital camera, it is mainly composed of a lens, an image sensor (CCD or CMOS device), ARM/DSP, etc. The lens gathers the light reflected by the object to the image sensor, which then converts it into a digital video signal and outputs it to the chip. After the chip performs a series of digital image signal processing (ISP) and data compression, it is transmitted to the back-end decoding display device through the network, thereby realizing functions such as video preview, recording, and playback.

From this we can see that the camera chip is the core component of the entire camera. It receives images from the image sensor and then performs a series of calculations and processing to realize the main functions of the digital network camera.

Digital camera chipsets, also known as System-on-Chip (SoC), integrate processor resources, memory resources, codec algorithms, peripheral device interfaces, etc. on a single platform. Most of the functions are fixed on the chip, and some special functional requirements are modularized. The source code is provided to users, and users can perform secondary development according to different application requirements. In addition, SoC can also add video coprocessors and other video subsystems to achieve functions such as preview, zoom, optical processing, and image and text overlay, thereby further enhancing video processing capabilities. As a high-definition digital camera chip solution, SoC can effectively meet the needs of complex video processing operations inside megapixel high-definition cameras and peripheral device interface expansion.

Camera processing chip architecture

General surveillance cameras are divided into three common parts: sensor, ISP, encoding compression or conversion. Some high-definition cameras also include an intelligent processor.

Sensor: refers to the CCD or CMOS we often mention. Its main function is photoelectric conversion, which converts light signals into electrical signals that the chip can receive and recognize.

ISP: Image processing part. The 2A (AWB/AE) or 3A (AWB/AE/AF) we often mention are all completed here. In traditional mode, a DSP or an FPGA is generally used to complete the post-processing of the image.

Coding compression or conversion: After the sensor signal is processed by the ISP part, it is generally transmitted to the subsequent coding compression or conversion part in a digital interface format such as SMPTE296M/BT.1120, and processed into a compressed TCP/IP signal or an uncompressed HD-SDI signal.

Intelligent video analysis: generally implemented using a separate DSP, which implements video analysis functions such as behavior analysis, video diagnosis, feature recognition, etc. However, due to limitations such as limited algorithm performance and difficulty in cross-platform porting, such products are rarely used at present.

Traditionally, these parts are separate from each other, and different parts are completed by different chips. With the development of technology, more and more chip manufacturers have integrated the latter two parts together, making the integration of HD video terminals higher and higher. In this context of integration, the technical development of HD video SoC in multi-service integration will be the most critical point.

High-definition camera chips need supporting products to function

The functions of the megapixel HD camera chip mainly include image sensor, image processing, video codec, video output, intelligent analysis, etc. Image sensors mainly include low illumination, wide dynamic, etc. Image processing (ISP) includes 3A (auto exposure, auto white balance, auto focus), edge enhancement, 3D noise reduction, image zoom, flip, brightness, chroma, saturation, contrast adjustment, digital wide dynamic, digital zoom, electronic image stabilization, etc.; image codec mainly includes MPEG4, H.264, MJPEG, multi-stream processing, etc.; video output mainly includes Ethernet, WIFI, CVBS, HDMI, SDI, etc.; intelligent analysis includes motion detection, perimeter protection, face detection, license plate recognition, video diagnosis, etc.

If it is just a simple small-scale demand, or if a large platform is already in place and the user's demand for high-definition network video on the TV wall is to be met, a chip with a single-channel decoding effect can be used. For small and medium-sized projects and grading points of large projects, NVR or the most popular hybrid DVR should be used to solve the problem. Considering that managing and storing a large amount of data streams from multiple million-dollar high-definition network cameras will consume a lot of network and PCI bandwidth, this is also a huge test for network chips and CPUs. This is also the reason why some chips currently integrate dual-core CPUs and gigabit network ports.

Application Prospects of Million High Definition Camera Chips

For current network camera chip solutions, on the one hand, only companies that provide SoC chip solutions can cope with more challenges in the future if they have sufficient relevant technologies; on the other hand, network cameras do not have as many functions as possible. The key is to quickly and conveniently meet customer needs at the current engineering level.

With the development of megapixel HD network cameras, the chips realize more functions and the integration is getting higher and higher. As a result, the peripheral devices will be less and less, and the power consumption will be lower and lower. In order to achieve system matching, digital HD cameras must have image sensors suitable for security applications, and the back-end connected to them must also have the support of decoding chip technology, so the performance of the back-end decoding display chip also needs greater breakthroughs.

The development of the chip of megapixel HD network camera cannot be simply regarded as the development of network camera, but the improvement of the series of supporting products is more worthy of attention. If we can consider how to be closer to the actual security engineering project from the chip design part, it will make megapixel HD network camera more widely used.

Technology Development Trend of High Definition Video Chips

From the perspective of the entire SoC video surveillance codec chip development process, the rapid development of image compression technology has promoted the formulation of image compression standards, thereby enabling embedded architectures and ARM and X86 signal CPU processors to be applied to codec chip platforms. The high performance and low power consumption of DSP digital signal processors make SoC an ideal platform for embedded image compression. The integration of multiple different image interfaces and I/O interfaces on such a general platform has enabled SoC to develop into a multimedia processor that is currently attracting much attention, in order to cope with the introduction of new surveillance products. In addition to the high-speed ARM or x86 and DSP core systems, SoC also has video auxiliary and subsystem processors such as high-definition output ports and alarm access control I/O or picture multimedia processors, which is also an increasingly clear development trend of codec chips.

As intelligent analysis and high definition become mainstream demands, in addition to DSP for general image processing, FPGA computing advantages are gradually valued and incorporated into coprocessors. With the increase in intelligent monitoring projects, the high-speed computing of FPGA combined with the good signal processing capabilities of DSP are valued. FPGA can replace DSP in complex image processing, such as video analysis and various wide dynamic range image compression processing. For high-definition image processing, FPGA can provide functions such as automatic exposure, automatic white balance, and wide dynamic range. In the past, DSP had difficulty in dealing with it. As long as FPGA is added to the chip architecture, complex matrix operations can be completed, which makes the encoding and decoding part more flexible and scalable. At present, most high-end monitoring equipment is already moving in this direction.

The technical development of SoC codec chips must include sensors (CCD or CMOS), image processors (ISP), image compression codecs and network transmission. Of course, the development of HDcctv or the partial integration of SLOC cannot be ignored. So, is there a single-chip product that can meet most digital video surveillance needs? According to the reporter, among the international brands, Axis' ARTPEC series chips have this function, and it has now developed to the fourth generation, ARTPEC-4.

According to Zou Yufan, Axis's China Solutions Manager, ARTPEC-4 was launched at the end of 2011. It is a single-chip solution independently developed by Axis specifically for network surveillance. The chip can integrate image processing, encoding, compression, and intelligent analysis functions. This single-chip solution can achieve more resource applications and has superior performance in terms of stability, encoding and decoding processing, and network adaptability. It has the characteristics of shorter latency, higher compression efficiency, and less bandwidth. At the same time, the chip also has advantages in ultra-low wide dynamic range and ultra-low illumination. The video provided by ARTPEC-4 has lower noise and higher photosensitivity, so it can provide clearer video images for moving objects. However, the reporter also learned that the ARTPEC chip is currently only used in Axis products and is not supplied to the outside world.

With the rapid development of the application of high-definition video surveillance products in recent years, it is expected that in the next 1-2 years, the market demand for high-definition products will show a blowout trend. The increase in demand will bring about the demand for higher performance and more functions on the one hand, and will also lead to further intensification of differentiated competition on the other hand. As the core part that can most affect both, the evolution of HD video SoC technology and the improvement of its performance play a decisive role in the market status of HD video terminals.

Industry insiders believe that in the future, the technological breakthroughs and developments in power consumption, encoding performance, ISP, intelligent analysis, decoding and display of HD video SoC will have a profound impact on the development of terminal products. Lower power consumption, higher encoding compression capability, fusion of image processing technology, integration of intelligent video technology, and improvement of system supporting chips will be the development direction.

Conclusion

At present, the major chip manufacturers in the industry have realized the integration trend of HD video chips and have invested a lot of resources in the research and development of a new generation of HD chips. They have begun to make achievements in highly integrated HD video chips. At the same time, some influential IC manufacturers are also eager to try. I believe that with the efforts and promotion of chip manufacturers, combined with the market promotion of downstream terminal manufacturers and the pull of user demand, the highly integrated and highly integrated new generation of HD video chips will achieve greater and greater development and gradually become a mature industry.