Design Trade-offs for Data Collection

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The analog acquisition section is the heart of any data acquisition system. Microprocessors, digital signal processors, memory, firmware, software drivers, operating systems, and software applications may constitute the brains of a system, but they are still analog circuits. To build a system with the necessary speed, resolution, and accuracy for an application, you need to find the right combination of analog data converters, op amps, multiplexers, and voltage references.

Figure 1 shows the path of a basic analog signal through an analog-to-digital converter (ADC). Every data acquisition system uses some form of this basic configuration. The choices you make for each component affect the choices of the others.

Figure 1 The analog channel includes components such as programmable gain amplifier (PGA), bias amplifier and low-pass filter (LPF).

The analog signal path begins at the input connector. Most data acquisition systems use some form of circuit protection before the analog circuitry. Components such as fuses or clamping diodes can limit the voltage or current entering the system to protect components from damage.

Data acquisition systems rarely use a single measurement channel. Digital multimeters (DMMs) typically have only one channel, but relays can be used in conjunction with the DMM to increase the number of channels. Data acquisition systems (whether plug-in boards, USB modules, or standalone systems) may have a dedicated ADC per channel, or just one ADC connected to multiple channels by a multiplexer (mux). Having a dedicated ADC per channel allows all channels of the system to sample simultaneously.

After the multiplexer (if used in the system), a programmable gain amplifier (PGA) amplifies or attenuates the input voltage from the sensor or other signal source to best fit the ADC's input voltage range. Some systems may use a second op amp that adds a DC offset voltage to the input signal. The offset voltage is used to shift the signal so that it is centered within the ADC's input range. Therefore, the ADC input voltage range is a major factor in selecting a PGA.

Additional clamping circuits can also be used to protect the ADC. Most system designers add a low-pass anti-aliasing filter before the ADC. This filter is used to limit the bandwidth of the signal path and minimize the last chance of aliasing before the ADC digitizes the signal.

To successfully digitize an analog signal, the ADC requires a reference voltage, Vref. Some ADCs have an internal reference, while others use an external reference source.

“We prefer external voltage references,” said Kevin Cawley, senior principal engineer at Keithley Instruments. “We believe that external voltage references are more stable than internal ones.”

Alex Ivchenko, engineering manager at United Electronic Industries (UEI), further said: "If you use an external reference, you can adjust the gain of the input path by controlling the ADC reference voltage. If the input voltage is too high, you need to provide a higher Vref."

The digital output of the ADC can be either serial or parallel. A serial bus provides better analog performance because fewer lines need to change at a given time, minimizes bounce on the power and ground lines, and reduces overall system noise. However, for the same number of bits, serial interfaces run at higher clock frequencies than parallel buses, so signals must be sent carefully to reduce noise.

ADC Selection

The selection of an ADC involves many design trade-offs that must be considered. Most ADCs in data acquisition systems use either a successive approximation register (SAR) or a sigma-delta architecture. In general, SAR devices are faster than sigma-delta ADCs, but sigma-delta architectures have higher resolution. If resolution greater than 18 bits is required, a sigma-delta converter is required.

The sampling rate and supply voltage of the ADC will determine the type of support circuitry that can be used. Taking the supply voltage as an example, most ADCs today are manufactured using CMOS processes rather than bipolar processes. CMOS devices consume much less power than bipolar devices and can also operate from lower supply voltage rails. Bipolar devices may require a 12V or 15V rail, while CMOS devices can use unipolar supplies of 5V, 4V, 3.3V, 2.5V, or even 1.8V.

Figure 2 Voltage references usually require either a) a bypass capacitor or b) a capacitor with a buffer amplifier.

Although lower voltages reduce power consumption, they also compress the dynamic range of the ADC. When the ADC runs at 12V, its dynamic range is six times that of a 0-4V device. Therefore, the same amount of noise will affect a 12V system much less than a 4V system. Therefore, the noise entering the ADC must be less than 1 least significant bit (LSB). The noise level of the op amp before the ADC must be consistent with 1 LSB dynamic range. This means that a 24-bit ADC has lower noise than a 16-bit ADC.

Cawley said that to achieve better dynamic range, high-level signals should be kept as far away from the analog channels as possible. He noted that Keithley's DMMs provide the best accuracy in the 10-V range, where neither amplification nor attenuation of the incoming signal is required.

Designer's work

Because high-voltage rails provide better dynamic range, many designers of industrial data acquisition systems require their op amps and data converters to use such rails. As a result, ADC manufacturers have developed CMOS data converters that operate on 16-V rails. Chris Hyde, senior field applications engineer at Analog Devices, points out that these devices can handle sensor inputs up to 15V.

Another compensation for low dynamic range is to digitize the sensor signal as early as possible. “High-speed ADC prices have dropped to a point where oversampling makes sense,” said UEI’s Ivchenko.

With oversampling, digital filters can be used to reduce noise. The more oversampling and filters, the better the noise suppression, but the slower the system. Ivchenko shows that using 22n oversampling and using a digital averaging filter will improve noise performance. The following table shows how much oversampling is needed to improve noise performance for a given number of bits.



Ivchenko adds a "brick wall" (120 dB/octave) digital finite impulse response (FIR) filter after the ADC to reduce noise and extract the spectrum of interest. He then extracts a portion of the data or does a moving average to make the sampling rate acceptable for the application.

Figure 3 A single-ended-to-differential converter circuit enables you to digitize a differential signal.

Low-voltage ADCs and op amps require sufficient supply current to keep signals stable during data conversion. “Designers often select op amps and voltage references that do not have adequate drive capability,” Hyde said. “A voltage reference may need to source and sink current at the same time.” An ADC may have a dynamic input impedance and may require adequate coupling from a low-impedance signal source to maintain the reference voltage level.

“SAR converters require a very low output impedance source to keep the input signal from changing during conversion,” says Luis Orozco, analog design engineer at National Instruments. “Because SAR ADCs typically present a high dynamic load to their power supplies, we need to bypass all components carefully.” He notes that it is important to use the right op amp with an ADC.

“An op amp that has the performance to achieve a particular ADC specification consumes many times more current than the ADC itself,” Orozco said. The reference input to the ADC behaves similarly to the signal input. Low-power devices, such as voltage references, may require capacitors or buffers to keep the output at a stable level while the ADC samples the reference.

Ivchenko adds, “Not only that, but bypass capacitors with low equivalent series resistance (ESR) should be used. Whenever possible, use X7R ceramic capacitors instead of tantalum capacitors. The capacitors must charge and discharge quickly enough to provide enough peak current to the ADC during conversion.” High ESR increases the time it takes to charge and discharge the capacitor.

Figure 2 shows two methods for providing sufficient current. In Figure 2a, a capacitor stores energy and supplies the ADC when it needs more current to keep the reference voltage stable. A 22µF capacitor is usually sufficient, but check the ADC data sheet to confirm this. In Figure 2b, an op amp is used to buffer the ADC voltage reference. The op amp provides a high impedance input to the voltage reference, while its low impedance output provides sufficient current to the ADC. Although the op amp solution is more elegant, it adds a bias voltage to Vref, which increases system noise, power consumption, and is more expensive.

Differential input

To improve dynamic range and noise rejection, differential inputs should be used in data acquisition systems. When using differential inputs (as opposed to single-ended inputs), any signal on both lines is rejected by the common-mode rejection (CMR) amplifier or ADC. If the sensor output is single-ended, a single-ended-to-differential conversion driver circuit can be used (Figure 3). Data acquisition systems can be designed to use either single-ended or differential inputs.

Many data acquisition systems use a multiplexer to add channels. The resistance and capacitance in the multiplexer can affect the integrity of the signal. For example, charge injection from the multiplexer can convert a DC signal into an AC signal. The on-resistance (Ron) combined with the parasitic capacitance forms a low-pass filter with an RC time constant. Figure 4 shows what happens if the time constant is too long relative to the sampling time.

Figure 4 Charge injection on-resistance and parasitic capacitance both cause adjacent channel leakage in multiplexing systems

This system error can be easily tested. Connect two adjacent channels (such as channels 0 and 1) in a multiplexed data acquisition system to DC voltages close to the input limits of the system, such as +10V and -10V. Next, alternate samples between the two input channels. Start by sampling each channel a few times and gradually move to one sample per channel, then switch channels.

If the time constant is faster than the sampling rate, you should see a square wave at half the sampling rate, but if the time constant is too long, you will get something resembling a triangle wave because of the charge injection between the channels.

Figure 5 The reference design board provides support circuitry and information for testing an ADC

"Ron should be no more than a few ohms," says Analog Devices' Hyde. "Hundreds of ohms of on-resistance are too high for most of today's data-acquisition applications." National Instruments' Orozco argues that hundreds of ohms are not too high because the upstream op amp has a high input impedance.

Hyde also points out that the on-resistance of the multiplexer varies depending on the amplitude of the system input signal. If you change the channel from one voltage rail to another, you need to know the RC time constant of the channel. As Ron varies with voltage, the channel capacitance creates an impedance that varies with frequency. These impedances, together with the capacitance, form a variable low-pass filter and cause distortion.

“The channels have to fall within the accuracy limits of the ADC to prevent charge-induced errors,” Hyde said. The new multiplexers have less capacitance than older models, he added.

Technical Data

When designing a data acquisition system, you will, of course, rely on data sheets for the ADC, op amp, and voltage reference. Component manufacturers also provide other valuable resources for their components, such as reference design boards (Figure 5). Often, you can purchase a reference design board to evaluate the components before designing them into your system.

Data sheets also provide design and layout information, but Keithley's Cawley has found that the information in the data sheet and the reference design board may not match. When designing a 500 ksample/sec, 18-bit data-acquisition system, Cawley used the design information in the data sheet but found that the noise generated by the ADC was between 3 and 7 LSBs (5 µV/LSB). "When I switched to the layout recommended by the reference design, the noise dropped to within 1 LSB," he said. "The reference design used four layers of ground under the QFP device. Nine vias were used to connect the ground plane, but the data sheet used a trace from the ADC to a bypass capacitor without a ground plane."

Analog IC manufacturers provide a wealth of technical information for ADC design. You can find application notes, data sheets, online seminars, technical papers, simulation software, etc. at no charge.

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