As electronic devices are increasingly used in automobiles and other products (intelligent), the integration of chips is getting higher and higher, the size is getting smaller and smaller, and the difficulty of research and development is getting higher and higher. These devices usually have the characteristics of short line spacing, thin lines, high integration, fast computing speed, low power consumption and high input impedance, which also leads to higher and higher requirements for static electricity for such devices. The standards involved are: ESD SP5.5.1-2004, ISO7637-2, GB/T.21437.2, ECER10.05 6.9, IEC62615:2010.
The ESD performance of many devices is tested using TLP. In addition to using a standard TLP pulse generator, an oscilloscope is also required to measure the pulses.
TLP Test
TLP (Transmission Line Pulse) test, also known as transmission line pulse test, is a common method for describing electrostatic protection semiconductor devices. In 1985, Maloney et al. proposed an ESD simulation method. Different from the traditional HBM, MM, CDM, and IEC models, the transmission line pulse generator emits an electrostatic simulation square wave, while the traditional model emits a pulse waveform in the RC-LC mode.
For other electrostatic models (CDM, HBM, MM, etc.), under the same damage energy, TLP has an approximate equivalent relationship with various electrostatic models. Considering the triggering effect of the rising edge, similar pulse width and rising edge are generally used for equivalence. Through further impact evaluation, the appropriate electrostatic equivalent square wave of different models can be confirmed. The above curve can be measured by square wave and used for ESD protection design simulation under the electrostatic model. The on-off characteristics in the test waveform results can be used to know the response of the device under the corresponding model. For two-stage/three-stage models such as IEC and spark discharge, it is necessary to test and analyze them in stages (such as ultrafast stage and ordinary stage).
Features of TLP
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Does not simulate real electrostatic discharge
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Record the fault level and characteristics tested
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Characterization
In other words, TLP equipment can simulate various forms of ESD pulses, and can provide approximate simulations in both electrostatic damage and rising edge triggering, so the two can be considered consistent. Under this approximate recognition, TLP can provide three different key curves of IV, IT, and VT in the ESD process, which other models cannot provide.
需要注意的是:TLP脉冲式方波,与真实情况有一定的出入,虽然可以近似模拟,但总是会有一定的差别,完全采信TLP结果,可能会导致考核值与其它厂家的设备有一定的差异,更有甚者,由于芯片的电荷存储效应,不同厂家的ESD测试设备之间测试结果也有一定的差异;此外,TLP系统是超快脉冲,轻微的寄生即可导致波形畸变,多通道的TLP系统在实现上难度较大,因此,替换常规ESD测试设备的可行性较弱。
test
A method of measuring the current-voltage characteristic curve of ESD protection components using short rectangular pulses generated by transmission lines. A square wave is generated by charging a suspended cable to a predetermined voltage and discharging it to the device under test (DUT). The pulse width and rise time can be easily changed by changing the cable length and filter characteristics.
The charging voltage source (VHV) provides rated energy to charge the transmission line (TL) and generate a narrow square wave (75ns~200ns). When the switch S is closed, the device under test (DUT) is connected to the transmission line, and the generated narrow square wave is applied to the protection structure of the DUT. The measured values obtained by the oscilloscope are then used to obtain the voltage and current values at both ends of the DUT based on calculations.
Among them, we will use the TLP generator to generate relevant pulse signals, and use the oscilloscope to monitor the voltage and current of the DUT. The test configuration is shown in the figure below. Since the pulse width of the pulse signal is very narrow and the signal rise time is at the ns level, we need to configure a suitable oscilloscope and corresponding probe for testing. According to the instructions given in IEC61000-4-2, we need to configure an oscilloscope and probe with a 1GHz measurement bandwidth.
The VF-TLP test has higher requirements for signals. At this time, we need to configure attenuators, short cables with high bandwidth, and high-bandwidth oscilloscopes to complete the corresponding tests. The bandwidth of the test instrument is even required to reach about 20GHz.
The following are the empirical comparison values of various ESD models. Of course, this empirical value is sometimes questionable.
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TLP's It2*1500Ω=HBM value
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MM*(9~10)=HBM
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IEC+(1.3k~2k)=HBM
The specific test steps can refer to the following instructions:
1. Use TLP pulser to send out pulses, use oscilloscope and corresponding probes, test cables, attenuators, etc. to test the voltage and current corresponding to the DUT end, and draw the response curve. TLP Pulser sends out pulses with the specified voltage V1, and the oscilloscope records the current I1.
2. Switch the test cable to the SMU to test the leakage current corresponding to the DUT. Use the IFIM (Force I Measure I) function to force the current I1 and measure Leakage1.
3. Repeat the above steps and draw the corresponding curve until the leakage current deflection point is obtained.
summary
In summary, during TLP testing, we need to configure the TLP pulse generator to generate the corresponding pulses, and we match the test equipment according to actual needs. The equipment used includes :
a) Tektronix oscilloscope, MSO5/6 oscilloscope is recommended
b) Corresponding test probes or attenuators and test cables, etc. (The above equipment is used to test the voltage and current of the pulse signal loaded on the DUT. The corresponding bandwidth sampling rate requirements are selected according to the pulse signal loaded by the TLP test, >1GHz bandwidth, sampling rate above 3GS/s, and the corresponding IV curve is drawn for the test)
c) Keithley instruments, SMU and 6485 test equipment: SMU provides bias voltage and load current for testing; leakage current test is based on the signal size, and it is recommended to choose 2450 or 6485 test equipment
At the Suzhou seminar on March 27, you can learn more about chip testing in detail. Please make an appointment to register.
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