Multi-channel signal generator (74LS00 and LM324)

1. Demand Analysis:

1. 19K~21KHz frequency square wave Uo1;

2. Sine wave Uo3.

3. Cosine wave Uo4.

4. Narrow pulse Uo2 with a duty cycle of 5%~15%.

5. The single chip microcomputer measures the frequency and amplitude of the sine wave Uo3;

6. The microcontroller measures the duty cycle of the narrow pulse Uo2.

2. Main components:

One LM324; One 74LS00N

3. Design Process

4. Working Principle

4.1 Complete Schematic Diagram

Note: (Multisim simulation seems to have many problems)

Square wave: symmetrical multivibrator;

Pulse: differential monostable trigger;

Sine wave: fourth-order active filter;

Cosine wave: Integrator circuit.

4.2 Simulation Environment

Online Simulation: Electronic Forest

https://www.eetree.cn/war/circuitjs.html?lang=zh

Offline simulation: Multisim;

4.3 Square Wave Generator

Symmetrical multivibrator

Functional description:

A multivibrator composed of two TTL NAND gates generates a square wave signal. The period of the square wave is T≈2.2RC, that is, to generate a 20KHz square wave, if C is 22nf, then R is about 1K, and a 2K potentiometer is used to achieve frequency adjustment between 19KHz and 21KHz.

Principle analysis:

By using the charge and discharge of the capacitor, when the input voltage reaches the threshold voltage VT of the NAND gate, the output state of the gate changes. Since the circuit is completely symmetrical, the charge and discharge time constants of the capacitor are the same, that is, the pulse widths generated are basically the same, so the output is a symmetrical square wave.

Pulse width tw1＝tw2≈0.7RC, T≈1.4RC

4.4 Sine Wave Generator

Functional description:

The first potentiometer divides the voltage of the input signal (square wave) to adjust the amplitude. The capacitor isolates the DC component. The second potentiometer adds a DC bias to the signal to pull it up. The signal is stabilized by a voltage follower and then passes through a fourth-order (two 2nd-order Sallen-Key structures) active low-pass filter to filter out high-frequency harmonics and obtain a sine wave.

Principle analysis:

A square wave can be expanded to be the sum of a sine wave with the same frequency and multiple high-frequency sine harmonics. The more ideal the square wave is, the more high-frequency harmonic components it has. By filtering out the high-frequency harmonics through a low-pass filter, only the fundamental component is left to obtain an ideal sine wave. A higher-order filter can make the output voltage drop at a faster rate in the high-frequency band to improve the filtering effect.

4.5 Cosine Wave Generator

Functional description:

The sine signal passes through the integration circuit, the voltage gain is Uo/Ui=1/2πRC, and the waveform undergoes a 90° phase shift to form a cosine wave.

Principle analysis:

The sin function is integrated to form a -cos function, so the output of the sine wave after passing through the inverting integrator is a cosine waveform. The transfer function of the inverting integrator in the S domain is Uo/Ui=-1/(SRC)=-1/(j2πfRC). The value of RC can be obtained by setting the transfer function 1/SRC=1 (i.e. proportional transmission).

The transfer function can be understood as using complex numbers to calculate the output voltage uo=ui/j2πfRC, where R and C are the resistance and capacitance of the integration circuit. f is the frequency (hz), and "j" means the phase shift is 90 degrees. The output is still a sine wave, but it is moved back 1/4 cycle.

Error of the integrator circuit:

1. Integrated operational amplifiers are not ideal. The operational amplifier itself will input offset voltage and DC bias, which will be integrated along with the input, causing Uo to gradually increase. The longer the time, the greater the error. In addition, the passband of the operational amplifier is not wide enough, making the integration circuit slow to respond to rapidly changing signals, causing the output waveform to lag, etc.

2. Influence of the integral capacitor: The capacitor has leakage resistance, which causes the amplitude of Uo to gradually decrease.

4.6 Narrow Pulse Generator

Functional description:

Use two TTL NAND gates to form a monostable trigger, and adjust the adjustable resistor value to change the duty cycle. (Note: This circuit is slightly different from the common monostable trigger style)

Principle analysis:

For the first R1C1 differentiator circuit, when the input negative pulse Vi arrives, the rising edge generates an upward positive spike pulse, whose value is higher than the positive threshold (2/3Vcc), and the falling edge generates a downward negative spike pulse, whose value is lower than the negative threshold (1/3Vcc).

At the beginning of the circuit operation, the No. 1 NAND gate charges the capacitor C1, the upper pin is '1', the lower pin is initially '0', the output state is '1', and C2 is charged. Because R2 is grounded, C2 enters a state of rapid charging and discharging, causing the lower pin of the No. 2 NAND gate to jump quickly between 01, resulting in an unstable high-level state at the front end of the figure.

After the circuit works stably, when encountering a rising edge, the voltage of capacitor C1 is higher than the positive threshold, and capacitor C1 discharges to the right side, but the upper pin of the No. 1 NAND gate is always '1', which has no effect on the circuit result; when encountering a falling edge, capacitor C1 quickly discharges to the left side, and stops when the voltage is equal to the negative threshold, so that the upper pin state of the No. 1 NAND gate quickly changes to '0', and the output quickly changes to a high level (similar to sending a signal), charging capacitor C2, so that the No. 2 NAND gate outputs a low level for a long time, and the No. 1 NAND gate outputs a high level for a short time, realizing a narrow pulse. In other states, the circuit is in a stable state where the No. 1 upper pin is long-term '1' and the output is low, and the No. 2 output is long-term '1'.

In short, the charging and discharging speeds of capacitors C1 and C2 are different, which controls the time interval tw of the output level. The smaller the RC, the faster the charging and discharging. R1C1 determines the minimum pulse duty cycle, and R2C2 determines the maximum duty cycle.

4.7 Summary of Physical Circuit

Although the actual circuit results in the reference video are good, the circuit results of my welding can basically meet the design requirements, but they are not ideal enough. The duty cycle of the square wave is relatively good, but there is a sudden drop at the tail of the waveform, and the generated pulse waveform has a dome phenomenon and is unstable. The sine and cosine waves have a problem of small amplitude.

Compared with the circuit results of other students, the circuit effect of this solution is not good overall (the influence of component characteristics and welding process is not excluded).