For quite a few products under test, such as connectors, circuit boards using slots, etc., special fixtures are required for S parameter testing. This is because the interfaces of these DUTs are usually non-common interface types such as SMA or BNC, while the connection interfaces of S parameter test instruments such as SPARQ and VNA are usually standard types such as SMA or BNC. Therefore, auxiliary fixtures are required for the connection between the DUT and the test instrument. As shown in Figure 1 below, some DUTs that require fixtures for S parameter testing (the lower left picture is a signal integrity S parameter tester from Teledyne LeCroy):
Figure 2 below shows a schematic diagram of using a fixture for connector testing:
The use of fixtures will definitely affect the S parameter test results of the DUT. If the impact of the fixture is very small compared to the DUT itself, it can be ignored. Or if the entire system (including the DUT and the fixture) is considered together, and what is needed is the S parameters and the overall performance of the DUT, then the impact of the fixture can be ignored. However, if the loss of the fixture is equivalent to the loss of the DUT, then the impact of the fixture is often not negligible. At this time, we need to consider using some methods to eliminate the impact of the fixture on the test.
2. Existing fixture de-embedding methods and their shortcomings
Currently, there are several main methods for fixture de-embedding in S parameter measurement:
1. De-embedding method based on fixture S parameters
This method is very convenient to use. As long as the fixture S parameters are brought into the test instrument calibration analysis software, the fixture can be de-embedded. However, the S parameters of a fixture are often not easy to obtain. For example, the S parameters of the probe used in the test are not only difficult to obtain, but even if the probe manufacturer provides the probe S parameters, in actual testing, the probe S parameters will often change due to the connection method, touch direction, etc., which will also affect the accuracy of the test results.
2. TRL calibration method
TRL (Through/Reflect/Line) calibration method is also a commonly used calibration method in the industry, which is suitable for calibrating fixtures with more complex transmission line structures. TRL fixtures require testers to design accurate fixtures including Through, Reflect, and Line in advance. TRL fixtures must be consistent with various parameters of the actual application board, such as the stacking of printed circuit boards, the thickness of each stacking layer, the dielectric constant of the materials used, the impedance control of the transmission line, the line width, etc. It is difficult to control two different boards that may be designed and produced at different times to be very consistent. In addition, the wear of the connectors on the fixture will also affect the calibration results.
3. OSLT calibration
The OSLT (Open/Short/Load/Through) calibration method is a standard calibration method. S-parameter test instruments usually come with this method as standard. The disadvantage of the OSLT calibration method is that it requires a complete set of standard calibration parts. Its interface is usually SMA or BNC, and it requires the end interface of the fixture (the interface connecting the fixture to the device under test DUT) to be SMA or BNC, while most test fixtures do not meet such requirements. If an embedded OSLT is designed for calibration, in addition to problems similar to TRL calibration, there will be other potential error sources, such as considering Short and Open as ideal situations and Load as non-frequency related.
4.
This is a method that is the same as OSLT in Teledyne LeCroy's signal integrity S-parameter analyzer SPARQ.
5. Time Domain Gating The time domain
gating calibration method is the latest calibration technology used by Teledyne LeCroy in SPARQ and is also the latest patented technology of Teledyne LeCroy. This method can reduce the shortcomings of the above calibration methods and has the advantage of easy operation. It is also very suitable for calibrating the probe when using the probe for S parameter testing.
In addition, the de-embedding of the probe using the S-parameter-based calibration method, TRL calibration method, OSLT calibration method, and other methods is another difficulty in S-parameter testing, because the probe model is difficult to simulate on the PCB board. The Gigaprobes shown in Figure 3 below are commonly used probes in S-parameter testing:
3. The new generation of time domain "Gating" de-embedding method used in LeCroy SPARQ
Figure 4 below shows the general topology of the S-parameter test instrument testing the DUT through the fixture.
As shown in Figure 4 above, for a DUT with P ports, a fixture with 2P ports will be required, where P ports are connected to P ports of the test instrument, and the other P ports are connected to the DUT. If the S parameters of the fixture with 2P ports are known, then de-embedding the fixture will become very easy. For example, the signal integrity S parameter analyzer of Teledyne LeCroy integrates a fixture de-embedding method based on S parameters. As shown in Figure 5 below, the fixture can be de-embedded by simply bringing the S parameter file *.snp corresponding to the fixture into the interface settings of Figure 5. However, as mentioned above, obtaining the S parameters of the fixture is the key. [page]
The time domain Gating method is to use the transmission line principle to make the transmission medium in the fixture in Figure 4 above equivalent. As long as the two parameters of each channel are obtained: delay (TD, Time Delay) and loss (Loss), the fixture can be de-embedded. The delay and loss parameters are relatively easy to obtain. If it is a fixture or cable from a professional manufacturer, the values of these two parameters are usually given. If it is a fixture set by yourself, then one way is to obtain these two parameters through EDA simulation software; the second way is to obtain them through simple and convenient actual measurements. Later we will introduce how to obtain these two parameters through measurement methods. Figure 6 below is a schematic diagram of using delay and loss to make the fixture with 2P ports equivalent.
Figure 7 below shows the interface for fixture de-embedding in Teledyne LeCroy's SPARQ using the time domain Gating method and two test methods for fixture delay and loss:
4. Principle of the time domain "Gating" de-embedding method
The time domain Gating method is to convert the S parameters of the entire measurement system (including the fixture and the DUT) into impedance (Z) through an algorithm, and then remove the impedance curve of the fixture part of the impedance curve of the entire system through the two parameters of the fixture's delay and loss, and then re-convert the part after the stripped fixture impedance curve into S parameters, thereby achieving fixture de-embedding. As shown in Figure 8 below, the blue dotted line is the impedance curve of the fixture:
The time domain Gating algorithm considers the impedance curve of the part to be stripped (impedance of the fixture) (which we call the Gated Element) as a series of transmission line structural units, as shown in Figure 9 below:
Then, a unit model (Segment) is established for each transmission line structural unit. The delay (Delay) and loss (Loss) of each unit model (Segment) can be obtained through the known parameters in the impedance curve of the entire stripping model, such as impedance, reflection coefficient, overall delay and loss, as shown in Figure 10 below. G (f) is the loss parameter related to frequency, and D (f) is the delay parameter related to frequency. Both functions can be obtained through the known impedance curve and overall delay and loss. In this way, the S parameters of each unit model can be derived, as shown in the figure below. For more detailed principles, please refer to the patented technical article of Teledyne LeCroy.
Then, the S parameters of each unit model of the stripping part (Gating Element) (before stripping) are substituted into the impedance stripping algorithm. The iterative algorithm traverses and calculates the entire stripping part (Gating Element). Each time the influence of the previous unit model (Segment) is eliminated, the impedance curve is recalculated. Finally, the S parameters of each unit model of the stripping part (after stripping) are obtained from this algorithm, as shown in Figure 11 below:
Then, the S parameter model of each unit is converted into T parameters, and then the T parameters are connected together to form a T parameter of the stripping part (Gating Element), and the T parameters are converted into S parameters, so that the S parameters of the part to be stripped are obtained. With the S parameters, the S parameter-based stripping algorithm in LeCroy's SPARQ software can be used to realize the de-embedding of the fixture.
5. Obtain the delay and loss parameters of the fixture/probe through measurement
If the delay and loss parameters of the fixture or probe are unknown, the delay and loss of the fixture or probe can also be estimated by using a 2X straight-through line. Therefore, when designing the fixture, it is recommended to add a 2X straight-through line to the fixture to measure the loss of the fixture/probe. As shown in Figure 13 below, it is a schematic diagram of a fixture. The port marked with SMA is connected to the test instrument, and the other port of the line segment marked with the port marked with SMA is connected to the DUT. The length of this line segment is X, so a 2X straight-through line refers to a straight-through line with SMA interfaces on both ports and a length of 2X.
First, we can use the step response characteristics of S21 or TDR technology (TDR impedance curve) to preliminarily estimate the delay. Then use the stripping (Time Domain Gating) algorithm for the 2X straight-through line. After stripping and de-embedding, the 2X straight-through line should theoretically have 0 loss, but since the current delay parameters are roughly estimated, it is necessary to fine-tune to obtain a more accurate value. Fine-tuning can be done by measuring the phase, as shown in the yellow waveform on the left in Figure 14 below. Before de-embedding, the phase should be periodically changing; after de-embedding, the phase should theoretically be 0, that is, a horizontal straight line at position 0, but in reality, since the delay value is not a very ideal value, the parameter value can be appropriately adjusted until the phase curve is a horizontal straight line, as shown in the waveform on the right in Figure 14 below. When the delay parameter is 217ps, the phase curve is close to a horizontal straight line. [page]
Next, the delay parameter can be set to 217ps. Before de-embedding, the S21 curve should be an inclined curve, as shown in the yellow curve on the left side of Figure 15. After de-embedding, theoretically, S21 should be a horizontal straight line with zero loss. If it is not a horizontal straight line with zero loss, it can be achieved by fine-tuning the loss parameters. The loss parameters at this time can be used as the loss parameters required for de-embedding.
6. Example of Gigaprobe de-embedding using the time domain gating method
Below is an example of deembedding for a DVT40-1mm Gigaprobe.
The impedance curve obtained by measuring the 3-inch PCB trace using Gigaprobe. From the figure, we can roughly distinguish which part is the impedance curve of the probe and which part is the impedance curve of the 3-inch trace.
Connect the Tip and Tip of two Gigaprobe probes together (in actual applications, it is recommended to use a 100mil PCB trace to make the connection more reliable), as shown in Figure 18 below. The white vertical dotted line is the center position of the two probes (the end of the probe Tip). Based on this center position, we can predict the delay of the probe. Then we can get the loss of the probe through S21, and input the delay parameter and loss parameter into the de-embedding interface to realize the de-embedding of the Gigaprobe probe.
The de-embedding result is shown in Figure 19 below:
In Figure 19, the white curve is the test result of the 3-inch trace before applying Gating de-embedding, the green curve is the impedance curve of the part that needs to be stripped (probe), the pink curve is the result of stripping the probe impedance curve using the Gating de-embedding principle, and the bottom orange curve is the enlarged impedance curve corresponding to the 3-inch trace.
Figure 20 below shows two technical white papers on de-embedding Gigaprobe probes using LeCroy's SPARQ and time domain Gating de-embedding methods:
VII. References
[1] http://www.google.com.hk/patents/US20120323505?dq=Peter+++Time+Domain+Gating
+++SPARQ&hl=en&sa=X&ei=D83iUYzyAofokAX08IEo&ved=0CDYQ6AEwAA
[2]sparq_de-embedding_gigaprobes_using_time_domain_gating_rev_1.1, Dr.Alan
Blankman, Teledyne
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