1. Principle
The four-quadrant photodetector is actually composed of four photodetectors, one in each quadrant. The target light signal passes through the optical system and forms an image on the four-quadrant photodetector, as shown in Figure 1. The four-quadrant photodetector is generally placed on the focal plane of the optical system or slightly away from the focal plane. When the target image is not on the optical axis, the amplitudes of the photoelectric signals output by the detectors in the four quadrants are different. By comparing the amplitudes of the four photoelectric signals, we can know in which quadrant the target image is located (and thus the orientation of the target). If an optical modulation disk is added in front of the four-quadrant photodetector, we can also calculate the distance or angle θ of the image point from the center of the four-quadrant photodetector.
Figure 1 Target imaging on a four-quadrant photodetector
Figure 2 Principle block diagram of azimuth detector.
After amplification and conditioning, the signal is sampled and converted into digital quantity by A/D converter (ADS7864 is used in this system) and sent to the microcontroller. After processing by the microcontroller, the target's direction is obtained and direction control instructions are output according to the actual needs of the system.
2. Circuit Design
According to the needs of the actual system, ADS7864 is used as the A/D converter and the most common 89C51 is used as the microcontroller.
Here is an introduction to ADS7864. ADS7864 is a 12-bit high-performance analog-to-digital converter produced by TI. It has an on-chip 2.5V reference voltage source, which can be used as the reference voltage of ADS7864. Each ADS7864 is actually composed of two ADCs with a conversion rate of 500ksps. Each ADC has three analog input channels, each channel has a sample-and-hold device, and two ADCs form three pairs of analog input terminals, which can simultaneously sample and hold 1 to 3 pairs of input signals, and then convert them one by one. Since 6 channels can be sampled simultaneously, it is very suitable for converting 4 photoelectric signals of a four-quadrant photodetector, and the remaining 2 channels are used for system expansion.
*The following mainly introduces the signal sampling, conversion and processing parts in the circuit.
ADS7864 front-end conditioning circuit
The front-end conditioning circuit of the analog-to-digital converter scales and translates the signal to be sampled, so that the conditioned signal meets the analog input requirements of the A/D converter. Figure 3 is the front-end conditioning circuit of an input channel of the ADS7864.
Figure 3 ADS7864 front-end conditioning circuit
The maximum voltage input range of +IN and -IN of the ADS7864 analog input channel is -0.3V to +5.3V (ADS7864 +5V power supply). Two op amps are used in the circuit of Figure 3. A1 is used as a follower to buffer the 2.5V reference voltage source output by the ADS7864; A2 and four resistors form a signal conditioning network. The appropriate configuration of R1 to R4 resistors can achieve the scaling and translation of the input signal Vi to meet the input requirements of the ADS7864 analog channel. The input voltage at the +IN terminal is expressed as follows:
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ADS7864 and MCU connection circuit
The result after conversion by ADS786 is output through DB0~DB15. If the BYTE pin is connected to a high level, each result is divided into two bytes and read out from DB0~DB7. It is very convenient to read with an 8-bit microcontroller. In order to avoid the interference of 89C51 on ADS7864, a 74HC244 buffer is used to connect the P0 port of 89C51 and the DB0~DB7 of ADS7864. The signals /HOLDA~/HOLDC and A0~A2 that control ADS7864 are also output through the P0 port of 89C51, and a 74HC373 is used to latch these control signals. Figure 4 is the connection circuit diagram of 89C51 and ADS7864, in which some other circuit connections are omitted.
Figure 4 Connection between ADS7864 and 89C51
The system uses 89C51's P2.7 to address ADS7864, the address is 8000H, and this address signal is used in conjunction with 89C51's /WR and /RD signals as enable signals for 74HC244 and 74HC373. It is required that when 89C51's /RD=0, P2.7=1, 74HC244 is turned on to read the conversion result of ADS7864; when 89C51's /WR=0, P2.7=1, 74HC373 latches the data signal on 89C51 P0 port to write data to the control end of ADS7864. At other times, 74HC244 and 74HC373 are turned off, thus avoiding interference of other signals on 89C51 P0 port to ADS7864. The reason for using latch 74HC373 to connect 89C51 and ADS7864 is to keep the voltage level of /HOLDA~/HOLDC, A0~A2 unchanged when ADS7864 converts data, so as not to affect the accuracy of ADS7864 conversion data. The enable signal truth table of 74HC244 and 74HC373 is as follows:
According to the truth table, the two enable signals can be implemented using the logic circuit in Figure 4. The ultimate goal of the system is to obtain data and then calculate the result. The code for 89C51 to control ADS7864 conversion and read the conversion result is as follows:
After starting the conversion, the number of instruction cycles that need to be delayed before reading the data depends on the operating speed of the 89C51 and ADS7864. The code and algorithm for calculating the target position will not be described here.
3. Conclusion
The azimuth detection instrument designed using the scheme proposed in this paper has the characteristics of being simple and effective, flexible and easy to expand, small in size, and easy to use. It can be used in many fields that require measuring the target's azimuth.
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