9.2 Open Day | You have an invitation letter from NI Open Lab

Want to absorb the valuable information without leaving home or experience hands-on practice on site?

How to participate in OpenLab Day is up to you

Following the first phase of the event, the second phase of NI OpenLab will be held on August 26 ! In this OpenLab Day , NI and Solo experts will bring wonderful application cases of Cypress and NXP , as well as a hands-on course on desktop ATE- level digital pattern instruments to the NI live studio .

In this hot summer, you can not only choose to communicate with technical experts online without leaving your home , but also choose to come to the NI Shanghai office to participate in OpenLab Day and visit the Open Lab ! Scan the QR code to sign up and choose your participation method!

Note: The on-site participation location is NI Shanghai Office, located in Zhangjiang Hi-Tech Park. Due to venue restrictions, please refer to the registration confirmation letter for offline participation quotas !

September 2 , 14:00 ~ 16:15

14:00 ~ 15:00 SoC and MCU digital interface verification and Cypress and NXP case analysis

15:00 ~ 16:00 Desktop ATE- level digital pattern instrument verification hands-on practice

16:00 ~ 16:15 Technical Q&A and lucky draw

Topic 1: SoC and MCU digital interface verification and Cypress and NXP case analysis

NI & Solitary Wave

Overview: With the changing chip application scenarios, more design companies use integrated IP to integrate functions, so as to make better use of mature IP , such as power management, ADC , digital interface, etc., which can greatly shorten the chip design cycle, greatly advance the time to market of new products , and make product forms more diverse. However, how to find vulnerabilities on early samples after tape-out and conduct feature analysis, and how to use more efficient methods for verification. In this live event, NI and its partners will analyze cases on site for you to see how NI and its partners help SoC and MCU companies to perform efficient post-silicon verification.

Topic 2 : Hands-on practice of desktop ATE- level digital pattern instrument verification

NI

Overview: Using large ATEs to perform Shmoo and timing verification in the laboratory verification phase is not a cost - optimal solution, and using traditional test and measurement instruments cannot provide the corresponding functions well. Based on this demand, the Pattern instrument designed by NI a compact PXI the ATE vector debugging and debug , Scan Pattern debugging and other tasks in the laboratory environment ; , it is equipped with analog and interface PXI instruments to achieve functional-level and system-level verification of the interface.

Want to learn more about the powerful functions of PXI digital pattern instruments? In this OpenLab Day , senior application engineers will provide hands-on practice and sharing for you.

Wang Zi

Senior Application Engineer at Shanghai Gubo Technology Co., Ltd.

Wang Zi has extensive experience in RF prototype development and automated testing. He joined Shanghai Solo Technology Co., Ltd. in 2019 and is currently responsible for the standardization and promotion of laboratory automated testing.

White Cool

NI Semiconductor Test Application Engineer

Key account support engineer, sorter communication expert, familiar with semiconductor production line test development and maintenance, dedicated to the research of semiconductor modular test solutions.

Want to absorb the valuable information without leaving home or experience hands-on practice on site?

Hurry up and choose your preferred form of participation to sign up for the event!

Note: The on-site participation location is NI Shanghai Office , located in Zhangjiang Hi-Tech Park. Due to venue restrictions, please refer to the registration confirmation letter for offline participation quotas !

Click to read the original text and you can also sign up ~

NI IC Open Lab It is the first test lab established by NI in China that is completely open to customers. The lab aims to provide the industry with:

- Provide an open communication platform to exchange chip testing technology with engineers through activities such as theme open days

-As the NI semiconductor laboratory test experience center, it is open to engineers for experience and practice by appointment

-Serves as a bridge between NI and its partners to provide engineers with remote and on-site professional test platforms and services

NI IC Open Lab has set up RF chip test benches for 5G , Wifi , ADC/DAC , PMIC , and mixed signal test benches for high-performance digital verification in NI Shanghai Office . It will provide engineers with appointment channels for remote or on-site experience and practice, and work with engineers to promote the development of chip testing technology.