rar

Implementation of Histogram Equalization Enhancement Algorithm in Real-time Image Processing

  • 2013-07-01
  • 219.04KB
  • Points it Requires : 2

Abstract: This paper introduces the application of histogram equalization enhancement algorithm in display system, and proposes to use FPGA (Field Programmable Gate Array) to process massive data in parallel to realize display system. Compared with traditional methods such as DSP, it has obvious advantages in processing real-time images and work efficiency. The design method of main modules is given, and the whole system design is compact, simple and reliable. [Author Abstract]

unfold

You Might Like

Uploader
论文帝
 

Recommended ContentMore

Popular Components

Just Take a LookMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
×