Experimental background: PXA270 processor is used, and the target platform is XSBASE270 (embedded competition platform in 2006). Since the storage space allocation of PXA270 is relatively fixed, for example, the 384MB space starting from address 0x0 is fixed as the static storage area, and the SDRAM space is 256MB starting from 0xa0000000 or 1GB address range starting from 0x80000000, therefore, if the embedded application has high requirements for speed and real-time performance, the application needs to be moved to SDRAM for operation, and the interrupt vector table needs to be copied to SDRAM, and the interrupt vector table must be stored at address 0 (some processors can also use the 0xffff0000 high address interrupt vector table). At this time, the address space must be remapped, and the SDRAM space is mapped to the starting place of address 0x0, and the FLASH space is mapped elsewhere. There are generally several ways to remap the address space or memory: First, set the dedicated remap register of the target processor to complete the remapping through hardware logic; second, some processors are designed with Bank registers that can be used to modify the starting address of the memory; third, processors with MMU can use MMU to map physical addresses to virtual addresses to complete the remapping of the address space. For the PXA270 processor, MMU can be used to perform address remapping. The experimental platform uses 32MB Intel NOR FLASH memory and 64MB SDRAM.
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