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Research on FPGA structure and layout and routing algorithms

2014-03-05
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The paper designs a FPGA structure description method to solve the FPGA modeling problem. The FPGA structure description method includes 10 parts, such as logic unit information and interconnection line information. When using different FPGA chips for layout and routing, it is only necessary to use the structure description method to redefine the structure of the FPGA chip, without changing the layout and routing tools. In order to cooperate with FPGA programming download, the paper improves the partitioning netlist algorithm and can generate LUT configuration information files. The layout and routing algorithm has been improved to support more commercial FPGA structural features. The developed layout and routing tool is close to VPR in terms of routability. The layout stage can reduce the number of logic unit exchanges by 21%. It generates internal connection information, layout information and routing information after layout and routing. This information provides the necessary support for the next stage of programming download of layout and routing, and can generate bitstream files to be downloaded to the FPGA.

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