[i=s]This post was last edited by Moiiiiilter on 2021-7-16 11:14[/i]Previously, the onboard LINK debugging and downloading of GD32VF103C_START felt very slow. Recently, I found that the latest V1.50 v
1. Clock generation process
The external clock or external crystal oscillator provides the clock source OSCCLK to the F28335, enabling the on-chip PLL circuit of the F28335. The PLL circuit multiplies
##ARM+DSP+IPU heterogeneous multi-core processors communicate between cores through IPC components###1. IPC inter-core communication IPC (Inter-Processor Communication) provides an API that is indepen
I have never heard of phase margin, because the op amp circuits I have come into contact with do not have capacitors. They are all simple circuits.
Now I think about it and I feel a little scared. I t
[i=s]This post was last edited by kangkls on 2022-3-3 21:23[/i]The download program in the previous post is the program of CH582\EVT\EXAM\TMR under the routine.
When I opened the program, I saw that G