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PLL Principles Lecture Notes

2013-09-29
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PLL Principles Lecture Notes\'Basic Principles of Phase-Locked Loops A typical phase-locked loop (PLL) system consists of three basic circuits: phase detector (PD), voltage controlled oscillator (VCO) and low-pass filter (LPF), as shown in Figure 1. Ud = Kd (θi–θo) UF = Ud F (s) θi θo Figure 1 1. Phase detector (PD) There are many circuit forms that constitute the phase detector. Here we only introduce two phase detectors used in the experiment. 1. XOR gate The logical truth value of the XOR gate is shown in Table 1, and Figure 2 is the logic symbol diagram. |Input|Output|| A | B |F ||0 |0 |0 ||0 |1 |1 ||1 |0 |1 ||1 |1 |0 | Table 1 Figure 2 From Table 1, we can see that if the input terminals A and B are respectively fed with a signal waveform with a duty cycle of 50%, then when there is a phase difference (θ) between the two, the duty cycle of the waveform at the output terminal F is related to (θ, as shown in Figure 3. The F output waveform is smoothed by an integrator, and the average value of the integrator output waveform is also related to (θ. In this way, we can use the XOR gate to convert the phase to voltage (θ) to form a phase detection circuit. Therefore, the average value (DC component) after integration by the integrator is: UU = Vdd * (θ/ ( (1) Vcc Different (θ) have different DC components Vd. The relationship between (θ and V can be described by Figure 4. As can be seen from the figure, the two are simply linearly related 1/2Vcc …

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