pdf

OXPCIe200_Datasheet

  • 2013-12-17
  • 787.8KB
  • Points it Requires : 2

OXPCIe200 Datasheet

Part of PLX\\\'s Expresso family of high-performance PCI Express® devices, the OXPCIe200 is a single-chip multi-port bridge with a rich set of connectivity ports and advanced system management to maximize data throughput while substantially reducing CPU and system loading.

A fully integrated, single-lane PCI Express end-point controller and SerDes enables host system to access the USB 2.0 host, SPI and SRAM ports, a PLX high-performance 950 UART, plus user-defined GPIOs/PWMs. The device operates as either dual USB 2.0 host ports or one USB 2.0 host port and one SPI or SRAM port providing a high-throughput communication path from a PCI Express host system to a slave processor or peripherals.

Complete with the Oxide development tools and certified device drivers, the OXPCIe200 is easy to design-in and the ideal connectivity solution for a diverse range of products, including inter-processor communication, device control, I/O expansion, and Multi-modem ExpressCard modules.

Accelerate product development and time to market with Oxide and PLX\\\'s easy-to-design-in, high-performance serial connectivity solutions that just work.

unfold

You Might Like

Uploader
gs001588
 

Recommended ContentMore

Open source project More

Popular Components

Just Take a LookMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
×