pdf

X28HC256 pdf datasheet (5V, Byte Alterable EEPROM)

  • 2013-09-22
  • 807.28KB
  • Points it Requires : 2

The X28HC256 is a second generation high performanceCMOS 32k x 8 EEPROM. It is fabricated with Intersil’sproprietary, textured poly floating gate technology, providinga highly reliable 5V only nonvolatile memory.The X28HC256 supports a 128-byte page write operation,effectively providing a 24μs/byte write cycle, and enablingthe entire memory to be typically rewritten in less than 0.8seconds. The X28HC256 also features DATA Polling andToggle Bit Polling, two methods of providing early end ofwrite detection. The X28HC256 also supports the JEDECstandard Software Data Protection feature for protectingagainst inadvertent writes during power-up and power-down.Endurance for the X28HC256 is specified as a minimum1,000,000 write cycles per byte and an inherent dataretention of 100 years.

unfold

You Might Like

Uploader
csdn_can
 

Recommended ContentMore

Popular Components

Just Take a LookMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
×