I am using the AX309 development board from Heijin and I am a beginner in FPGA. Today I simulated the serial port routine in their tutorial. First, I had a problem simulating a simple clock divider mo
[size=4]1. The timer uses two modes: query and interrupt. Most logic chips have the ability to output 0 more than the ability to output 1. [/size] [size=4] [/size] [size=4](1) Query mode: TMSEL determ
[i=s]This post was last edited by jinglixixi on 2020-10-21 23:36[/i]With the display capability of the 2.2' TFT screen, the data obtained by A/D conversion can be intuitively displayed in the form of
1. Introduction to 0.96 OLED displayThe resolution of 0.96-inch OLED is 128*64; that is, the OLED display is 128 rows*64 columns, and uses the IIC interface for communication (default address 0x78). T