Use of overload protection input: The SPMC75F2413A chip contains an overload protection circuit. When the overload protection input pin (OL) is pulled low, the circuit starts to work. The overload protection input signal is sampled by the FCK/4 clock. The number of samples can be from 0 to 15. There are three ways to release the overload protection: release by timer compare match, delayed release or automatic release. When the overload protection input has returned to a high level, the above three methods can be used to release. During the overload protection period, it can be set to not prohibit the output of any phase, prohibit the output of all phases, prohibit the output of the PWM phase or all high/low phases are prohibited from output according to their validity. The prohibition method is selected by (P_OLx_Ctrl.OLMD, x = 1, 2), and the motor drive PWM outputs are determined by their instantaneous on state before being prohibited. The prohibited phase means putting the phase at an invalid level. 1.1.1 Control and Status Registers P_OL1_Ctrl ($7468): Overload Input 1 Control and Status Register P_OL2_Ctrl ($7469): Overload Input 2 Control and Status Register
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