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Maximum frequency drift rate in low loop bandwidth of AD9548 clock

  • 2013-09-22
  • 621.84KB
  • Points it Requires : 2

  The AD9548 is a digital PLL with a direct digital synthesizer (DDS), where the DDS acts like a VCO in an analog PLL. However, unlike a VCO, the output signal of the DDS is derived from a dedicated external clock source, the system clock. The system clock is essentially the sampling clock for the DDS. The relationship between the system clock frequency (fS) and the DDS output frequency (fO) and the digital frequency tuning word (FTW) is as follows:

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