Abstract: A complementary algorithm suitable for implementing finite impulse response (FIR) filters using CPLD devices is presented. An 8th order, 11-bit linear phase FIR filter is designed using the ispLS18840 device of Lattice, and a method for extended design using multiple CPLD devices is proposed to implement a higher order linear phase FIR filter. The design of the FIR filter is realized by using a small multiplication lookup table and a pipeline adder with carry lookahead, which improves the working speed and saves device resources. The maximum working frequency can reach 60MHz. Hardware simulation analysis is carried out on a computer, and the simulation results are compared with the theoretical calculation results. It shows that the filter works reliably, has high precision, and has good practical value.
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