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EBD11UD8ADDA-6B

Description
1GB DDR SDRAM SO-DIMM (128M words x64 bits, 2 Ranks)
Categorystorage    storage   
File Size208KB,19 Pages
ManufacturerELPIDA
Websitehttp://www.elpida.com/en
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EBD11UD8ADDA-6B Overview

1GB DDR SDRAM SO-DIMM (128M words x64 bits, 2 Ranks)

EBD11UD8ADDA-6B Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerELPIDA
Parts packaging codeMODULE
package instructionDIMM, DIMM200,24
Contacts200
Reach Compliance Codeunknow
ECCN codeEAR99
access modeDUAL BANK PAGE BURST
Maximum access time0.7 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)167 MHz
I/O typeCOMMON
JESD-30 codeR-XDMA-N200
JESD-609 codee0
memory density8589934592 bi
Memory IC TypeDDR DRAM MODULE
memory width64
Number of functions1
Number of ports1
Number of terminals200
word count134217728 words
character code128000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128MX64
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIMM
Encapsulate equivalent codeDIMM200,24
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)235
power supply2.5 V
Certification statusNot Qualified
refresh cycle8192
self refreshYES
Maximum standby current0.048 A
Maximum slew rate4.6 mA
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal pitch0.6 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
DATA SHEET
1GB DDR SDRAM SO-DIMM
EBD11UD8ADDA
(128M words
×
64 bits, 2 Ranks)
Description
The EBD11UD8ADDA is 128M words
×
64 bits, 2
ranks Double Data Rate (DDR) SDRAM Small Outline
Dual In-line Memory Module, mounting 16 pieces of
512M bits DDR SDRAM sealed in TCP package. Read
and write operations are performed at the cross points
of the CK and the /CK. This high-speed data transfer
is realized by the 2 bits prefetch-pipelined architecture.
Data strobe (DQS) both for read and write are available
for high speed and reliable data bus design. By setting
extended mode register, the on-chip Delay Locked
Loop (DLL) can be set enable or disable. This module
provides high density mounting without utilizing surface
mount technology. Decoupling capacitors are mounted
beside each TCP on the module board.
Note: Do not push the cover or drop the modules in
order to avoid mechanical defects, which may
result in electrical defects.
Features
200-pin socket type small outline dual in line memory
module (SO-DIMM)
PCB height: 31.75mm
Lead pitch: 0.6mm
2.5V power supply
Data rate: 333Mbps/266Mbps (max.)
2.5 V (SSTL_2 compatible) I/O
Double Data Rate architecture; two data transfers per
clock cycle
Bi-directional, data strobe (DQS) is transmitted
/received with data, to be used in capturing data at
the receiver
Data inputs, outputs and DM are synchronized with
DQS
4 internal banks for concurrent operation
(Components)
DQS is edge aligned with data for READs; center
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge; data
referenced to both edges of DQS
Data mask (DM) for write data
Auto precharge option for each burst access
Programmable burst length: 2, 4, 8
Programmable /CAS latency (CL): 2, 2.5
Refresh cycles: (8192 refresh cycles /64ms)
7.8µs maximum average periodic refresh interval
2 variations of refresh
Auto refresh
Self refresh
Document No. E0431E20 (Ver. 2.0)
Date Published April 2004 (K) Japan
URL: http://www.elpida.com
Elpida
Memory, Inc. 2003-2004

EBD11UD8ADDA-6B Related Products

EBD11UD8ADDA-6B EBD11UD8ADDA EBD11UD8ADDA-7A EBD11UD8ADDA-7B
Description 1GB DDR SDRAM SO-DIMM (128M words x64 bits, 2 Ranks) 1GB DDR SDRAM SO-DIMM (128M words x64 bits, 2 Ranks) 1GB DDR SDRAM SO-DIMM (128M words x64 bits, 2 Ranks) 1GB DDR SDRAM SO-DIMM (128M words x64 bits, 2 Ranks)
Is it Rohs certified? incompatible - incompatible incompatible
Maker ELPIDA - ELPIDA ELPIDA
Parts packaging code MODULE - MODULE MODULE
package instruction DIMM, DIMM200,24 - DIMM, DIMM200,24 DIMM, DIMM200,24
Contacts 200 - 200 200
Reach Compliance Code unknow - unknow unknow
ECCN code EAR99 - EAR99 EAR99
access mode DUAL BANK PAGE BURST - DUAL BANK PAGE BURST DUAL BANK PAGE BURST
Maximum access time 0.7 ns - 0.75 ns 0.75 ns
Other features AUTO/SELF REFRESH - AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 167 MHz - 133 MHz 133 MHz
I/O type COMMON - COMMON COMMON
JESD-30 code R-XDMA-N200 - R-XDMA-N200 R-XDMA-N200
JESD-609 code e0 - e0 e0
memory density 8589934592 bi - 8589934592 bi 8589934592 bi
Memory IC Type DDR DRAM MODULE - DDR DRAM MODULE DDR DRAM MODULE
memory width 64 - 64 64
Number of functions 1 - 1 1
Number of ports 1 - 1 1
Number of terminals 200 - 200 200
word count 134217728 words - 134217728 words 134217728 words
character code 128000000 - 128000000 128000000
Operating mode SYNCHRONOUS - SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C - 70 °C 70 °C
organize 128MX64 - 128MX64 128MX64
Output characteristics 3-STATE - 3-STATE 3-STATE
Package body material UNSPECIFIED - UNSPECIFIED UNSPECIFIED
encapsulated code DIMM - DIMM DIMM
Encapsulate equivalent code DIMM200,24 - DIMM200,24 DIMM200,24
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY - MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius) 235 - 235 235
power supply 2.5 V - 2.5 V 2.5 V
Certification status Not Qualified - Not Qualified Not Qualified
refresh cycle 8192 - 8192 8192
self refresh YES - YES YES
Maximum standby current 0.048 A - 0.048 A 0.048 A
Maximum slew rate 4.6 mA - 3.88 mA 3.88 mA
Maximum supply voltage (Vsup) 2.7 V - 2.7 V 2.7 V
Minimum supply voltage (Vsup) 2.3 V - 2.3 V 2.3 V
Nominal supply voltage (Vsup) 2.5 V - 2.5 V 2.5 V
surface mount NO - NO NO
technology CMOS - CMOS CMOS
Temperature level COMMERCIAL - COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form NO LEAD - NO LEAD NO LEAD
Terminal pitch 0.6 mm - 0.6 mm 0.6 mm
Terminal location DUAL - DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
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